A new junction termination technique for power devices: RESURF LDMOS with SIPOS layers

Proceedings of the International Symposium on Power Semiconductor Devices and ICs

Volumn 1992-May, Issue , 1992, Pages 213-216

  Charitat, G ^a   Bouanane, M A ^a   Rossel, P ^a  

^a CNRS   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC BREAKDOWN; MOS DEVICES; SEMICONDUCTOR JUNCTIONS;

JUNCTION DEPTH; JUNCTION TERMINATION; ON-RESISTANCE; OPTIMAL VALUES; OXIDE THICKNESS; POWER DEVICES; RESURF LDMOS; TECHNOLOGICAL PARAMETERS;

POWER SEMICONDUCTOR DEVICES;

EID: 85002032561     PISSN: 10636854     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPSD.1992.991268     Document Type: Conference Paper

References (6)

1. G. Charitat, D. Jaume, A. Peyre-Lavigne, P. Rossel "1000 and 1500 volts Planar Devices using Field Plate and Semi-Resistive Layers: Design and Fabrication" IEDM. San Francisco (U. S. A.), Dec. 1990.
2. D. Jaume, G. Charitat, J. M. Reynes, P. Possel, "High-Voltage Planar Devices Using Field Plate and Semi-Resistive Layers", IEEE Transactions on Electronic Devices ED-38, 7 July 1991, 1681-1684
3. J. A. APPELS and col., "Thin layer high-voltage devices", PHILTPS J. RES.. 35, 1-13, 1980
4. G. Charitat, "Modélisation et realisation de composants planar haute-tension (Modeling and Fabrication of Planar High-Voltage Devices) ", These de doctorat d'e"tat es sciences, spécialité: é1ectronique, Université Paul Sabatier, Toulouse, 28 September 1990
5. G. Charitat, A. Nezar, P. Rossel, "Bidimensional Analysis of High Voltage RESURF LDMOS for Smart Power Integrated Circuits: On and Off State", Symposium on High Voltage and Smart Power ICs. Los Angeles, May 7-12 1989.
6. G. Charitat, H. Tranduc, P. Granadel, P. Rossel, "Improvement of the ON Resistance of Power VDMOS by Surface Doping: Effect on the Breakdown Voltage", Microelectronics Journal. 21. 6, December 1990