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Volumn 1992-December, Issue , 1992, Pages 905-908

High performance deep submicron buried channel PMOSFET using P+ poly-Si spacer induced self-aligned ultra shallow junctions

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRODES; INVERSION LAYERS; MOSFET DEVICES; REFRACTORY METAL COMPOUNDS;

EID: 84994646711     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.1992.307503     Document Type: Conference Paper
Times cited : (5)

References (9)
  • 1
    • 0022027064 scopus 로고
    • Design trade-offs between surface and buried-channel FET's
    • G. Hu and R. H. Bruce, "Design trade-offs between surface and buried-channel FET's, "IEEE Trans. El. Dev., ED-32, p. 584, 1985.
    • (1985) IEEE Trans. El. Dev. , vol.ED-32 , pp. 584
    • Hu, G.1    Bruce, R.H.2
  • 2
    • 0021453025 scopus 로고
    • Device design for the submicrometer p-channel FET with n+ polysilicon gate
    • K. Cham and S. Y. Chiang, "Device design for the submicrometer p-channel FET with n+ polysilicon gate, "IEEE Trans. El. Dev. ED-31, p. 964, 1984.
    • (1984) IEEE Trans. El. Dev. , vol.ED-31 , pp. 964
    • Cham, K.1    Chiang, S.Y.2
  • 3
    • 0020717350 scopus 로고
    • Channeling effect of low energy boron implant in (100) silicon
    • T. M. Liu and W. G. Oldham, "Channeling effect of low energy boron implant in (100) silicon, " IEEE Elect. Dev. Lett., vol. EDL-4, p. 59, 1983.
    • (1983) IEEE Elect. Dev. Lett. , vol.EDL-4 , pp. 59
    • Liu, T.M.1    Oldham, W.G.2
  • 4
    • 0021640248 scopus 로고
    • High performance subhalf-micrometer p-channel transistors for CMOS VLSI
    • A. E. Schmitz, P. K. Vasudev and J. Chen, "High performance subhalf-micrometer p-channel transistors for CMOS VLSI, " IEDM Tech. Dig., p. 423, 1984.
    • (1984) IEDM Tech. Dig , pp. 423
    • Schmitz, A.E.1    Vasudev, P.K.2    Chen, J.3
  • 6
    • 0022957458 scopus 로고
    • Investigation and reduction of hot electron induced punchthrough (HEIP) effect in submicron PMOSFETS
    • M. Koyanagi, A. G. Lewis, J. Zhu, R. A. Martin, T. Y. Huang and J. Chen, "Investigation and reduction of hot electron induced punchthrough (HEIP) effect in submicron PMOSFETS, " IEDM Tech. Dig., p. 722, 1986.
    • (1986) IEDM Tech. Dig , pp. 722
    • Koyanagi, M.1    Lewis, A.G.2    Zhu, J.3    Martin, R.A.4    Huang, T.Y.5    Chen, J.6
  • 7
    • 0025592391 scopus 로고
    • A highly reliable 0. 3pm n-channel MOSFET using poly spacers
    • I. C. Chen, J. P. Lin and C. W. Teng. 'A highly reliable 0. 3pm n-channel MOSFET using poly spacers, " Dig. of Symp. on VLSI Tech., p. 39, 1990.
    • (1990) Dig. of Symp. on VLSI Tech , pp. 39
    • Chen, I.C.1    Lin, J.P.2    Teng, C.W.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.