A genetic programming approach to logic function synthesis by means of multiplexers

Proceedings of the 1st NASA/DoD Workshop on Evolvable Hardware

Volumn , Issue , 1999, Pages 46-53

  Hernandez Aguirre, A ^a   Coello, C A ^b   Buckles, B P ^a  

^a Tulane University   (United States)

^b LABORATORIO NACIONAL DE INFORMÁTICA AVANZADA   (Mexico)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER CIRCUITS; GENETIC ALGORITHMS; HARDWARE; MULTIPLEXING EQUIPMENT; NASA;

FEASIBLE DESIGN; FITNESS FUNCTIONS; LOGIC FUNCTIONS; SEARCH SPACES; TRUTH TABLES;

GENETIC PROGRAMMING;

EID: 84991891498     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EH.1999.785434     Document Type: Conference Paper

References (16)

1. A. E. Almaini, J. Miller, and L. Xu. Automated syn-Thesis of digital multiplexer networks. IEE Proceedings Pt E, 139(4):329-334, July 1992.
2. C. A. Coello, A. D. Christiansen, and A. H. Aguirre. Using genetic algorithms to design combinational logic circuits. In C. H. Dagli, M. Akay, C. L. P. Chen, B. R. Farnandez, and J. Ghosh, editors, Intelligent Engineering Systems Through Artificial Neural Net-works. Volume 6. Fuzzy Logic and Evolutionary Pro-gramming, pages 391-396. ASME Press, St. Louis, Missouri, USA, nov 1996.
3. C. A. Coello, A. D. Christiansen, and A. H. Aguirre. Automated Design of Combinational Logic Circuits using Genetic Algorithms. In D. G. Smith, N. C. Steele, and R. F. Albrecht, editors, Proceedings of the International Conference on Artificial Neural Nets and Genetic Algorithms, pages 335-338. Springer-Verlag, University of East Anglia, England, April 1997.
4. M. Davio, J. P. Deschamps, and A. Thayse. Digital systems, with algorithm implementation. Wiley, New York, USA, 1983.
5. R. Gorai and A. Pal. Automated synthesis of combi-national circuits by cascade networks of multiplexers. IEE Procedings Pt E, 137(2):164-170, Mar. 1990.
6. H. Iba, M. Iwata, and T. Higuchi. Gate-Level Evolv-Able Hardware: Empirical Study and Application. In D. Dasgupta and Z. Michalewicz, editors, Evolu-Tionary Algorithms in Engineering Applications, pages 260-275. Springer-Verlag, Berlin, 1997.
7. J. R. Koza. Genetic Programming. On the Program-ming of Computers by Means of Natural Selection. The MIT Press, 1992.
8. J. R. Koza, D. Andre, I. Forrest H. Bennett, and M. A. Keane. Use of automatically defined functions and architecture-Altering operations in automated circuit synthesis with genetic programming. In J. R. Koza, D. E. Goldberg, D. B. Fogel, and R. L. Riolo, editors, Proceedings of the First Annual Conference on Genetic Programming, pages 132-140, Cambridge, Masachus-setts, jul 1996. Stanford University, The MIT Press.
9. J. R. Koza, I. Forrest H. Bennett, D. Andre, and M. A. Keane. Automated WYWIWYG design of both the topology and component values of electrical circuits using genetic programming. In J. R. Koza, D. E. Gold-berg, D. B. Fogel, and R. L. Riolo, editors, Proceedings of the First Annual Conference on Genetic Program-ming, pages 123-131, Cambridge, Masachussetts, jul 1996. Stanford University, The MIT Press.
10. G. G. Langdon. A decomposition chart technique to aid in realizations with multiplexers. IEEE Transac-Tions on Computers, C-27(2):157-159, Feb. 1978.
11. S. J. Louis. Genetic Algorithms as a Computational Tool for Design. PhD thesis, Department of Computer Science, Indiana University, aug 1993.
12. J. F. Miller, P. Thomson, and T. Fogarty. Designing Electronic Circuits Using Evolutionary Algorithms. Arithmetic Circuits: A Case Study. In D. Quagliarella, J. Periaux, C. Poloni, and G. Winter, editors, Genetic Algorithms and Evolution Strategy in Engineering and Computer Science, pages 105-131. Morgan Kaufmann, Chichester, England, 1998.
13. A. Pal. An algorithmic optimal logic design using multiplexers. IEEE Transactions on Computers, C-35(8):755-757, Aug. 1986.
14. S. G. Shiva. Introduction to Logic Design. Scott, Fores-man and Company, 1988.
15. A. Tosser and D. Aoulad-Syad. Cascade networks of logic functions built in multiplexer units. IEE Pro-ceedings Pt E, 127(2):64-68, Mar. 1980.
16. S. S. Yau and C. K. Tang. Universal logic modules and their application. IEEE Transactions on Computers, C-19(2):141-149, Feb. 1970.