-
2
-
-
0022242089
-
CEMU - A concurrent timing simulator
-
Ackland, B. et al, "CEMU - A Concurrent Timing Simulator," Proc 1985 IC CAD, pp 122-124.
-
(1985)
Proc IC CAD
, pp. 122-124
-
-
Ackland, B.1
-
3
-
-
84939383596
-
Towards VLSI complexity: The da algorithm scaling problem: Can special da hardware help?
-
Adshead, H, "Towards VLSI Complexity: The DA Algorithm Scaling Problem: Can Special DA Hardware Help?," Proc 1982 Design Automation Conf., pp 339-344.
-
(1982)
Proc Design Automation Conf
, pp. 339-344
-
-
Adshead, H.1
-
4
-
-
0022229574
-
Circuit partitioning for hardware simulation engines
-
Agrawal, P, "Circuit Partitioning for Hardware Simulation Engines," Proc 1985 IC CAD, pp 161-163.
-
(1985)
Proc IC CAD
, pp. 161-163
-
-
Agrawal, P.1
-
5
-
-
0022209735
-
A Multiprocessor Implementation of a Logic-level Timing Simulator
-
Arnold, J and C Terman, "A Multiprocessor Implementation of a Logic-level Timing Simulator," Proc 1985 IC CAD, pp 116-118.
-
(1985)
Proc IC CAD
, pp. 116-118
-
-
Arnold, J.1
Terman, C.2
-
6
-
-
0022221707
-
Distributed discrete event simulation using dataflow
-
Ashok, V and R Costello, "Distributed Discrete Event Simulation using Dataflow," Proc 1985 Parallel Processing Conf, pp 503-510.
-
(1985)
Proc Parallel Processing Conf
, pp. 503-510
-
-
Ashok, V.1
Costello, R.2
-
7
-
-
0021570991
-
EP-1 (event processor-1): A logic simulation machine for VLSI
-
Amano, N et al, "EP-1 (Event Processor-1): A Logic Simulation Machine for VLSI," Proc 1984 ICCAD, pp 251-253.
-
(1984)
Proc ICCAD
, pp. 251-253
-
-
Amano, N.1
-
8
-
-
0022221707
-
Distributed discrete event simulation using dataflow
-
Ashok, V et al, "Distributed Discrete Event Simulation Using Dataflow," Proc. 1985 IEEE Parallel Processing Conf., pp 503-510.
-
(1985)
Proc. IEEE Parallel Processing Conf
, pp. 503-510
-
-
Ashok, V.1
-
10
-
-
0009671216
-
A computer architecture for digital logic simulation
-
Sept
-
Barto, R and S A Szygenda, "A Computer Architecture for Digital Logic Simulation," Electronic Engineering, Sept. 1980, pp 35-66.
-
(1980)
Electronic Engineering
, pp. 35-66
-
-
Barto, R.1
Szygenda, S.A.2
-
11
-
-
0021481531
-
A survey of hardware accelerators used in computer-aided design
-
Aug
-
Blank, T, "A Survey of Hardware Accelerators Used in Computer-Aided Design," IEEE Trans. on Design & Test, Aug 1984, pp 21-39.
-
(1984)
IEEE Trans. on Design & Test
, pp. 21-39
-
-
Blank, T.1
-
12
-
-
0022242090
-
Hardware acceleration of logic simulation using a dataflow architecture
-
Catlin, G and B Paseman, "Hardware Acceleration of Logic Simulation Using a Dataflow Architecture," Proc 1985 IC CAD, pp 130-132.
-
(1985)
Proc IC CAD
, pp. 130-132
-
-
Catlin, G.1
Paseman, B.2
-
13
-
-
0018999316
-
Asynchronous distributed simulation via a sequence of parallel computations
-
April
-
Chandy, K M and J Misra, "Asynchronous Distributed Simulation via a Sequence of Parallel Computations," Communications of the ACM, April, 1981, pp 198-206.
-
(1981)
Communications of the ACM
, pp. 198-206
-
-
Chandy, K.M.1
Misra, J.2
-
14
-
-
0022188934
-
Useful parallelism in a multiprocessing environment
-
Cytron, R, "Useful Parallelism in a Multiprocessing Environment," Proc 1985 Parallel Processing Conf., pp 450-457.
-
(1985)
Proc Parallel Processing Conf
, pp. 450-457
-
-
Cytron, R.1
-
15
-
-
0020856276
-
CAE stations' simulators tackle 1 million gates
-
Nov
-
"CAE Stations' Simulators Tackle 1 Million Gates," Electronic Design, Nov. 1983.
-
(1983)
Electronic Design
-
-
-
17
-
-
0020750756
-
Design and implementation of a software simulation engine
-
Denneau, M et al, "Design and Implementation of a Software Simulation Engine," CAD, vol. 15, no. 3 (1983), pp 123-130.
-
(1983)
CAD
, vol.15
, Issue.3
, pp. 123-130
-
-
Denneau, M.1
-
18
-
-
0021571273
-
An automatic test pattern generation machine
-
El-Ziq, Y M, and A K Bhatt, "An Automatic Test Pattern Generation Machine," Proc 1984 ICCAD Conf, pp 257-259.
-
(1984)
Proc ICCAD Conf
, pp. 257-259
-
-
El-Ziq, Y.M.1
Bhatt, A.K.2
-
24
-
-
0022229285
-
Star's evolving design environment: A user's perspective on CAE
-
Goates, G.A. et al. "Star's Evolving Design Environment: A User's Perspective on CAE," Proc. 1985 Design Automation Conf., pp 584-590.
-
(1985)
Proc. Design Automation Conf
, pp. 584-590
-
-
Goates, G.A.1
-
25
-
-
0022241554
-
MuSiC an event flow computer for fast simulation of digital systems
-
Hahn, W and K Fischer, "MuSiC An Event Flow Computer for Fast Simulation of Digital Systems," Proc 1985 Design Automation Conf., pp 338-344.
-
(1985)
Proc Design Automation Conf
, pp. 338-344
-
-
Hahn, W.1
Fischer, K.2
-
26
-
-
0022205569
-
The STE-264 accelerated electronic CAD system
-
Hefferan, P M et al, "The STE-264 Accelerated Electronic CAD System," Proc. 1985 Design Automation Conf., pp 352-358.
-
(1985)
Proc. Design Automation Conf
, pp. 352-358
-
-
Hefferan, P.M.1
-
27
-
-
0020877401
-
Introduction to the IBM los gatos logic simulation machine
-
Howard, J K, R L Malm and L M Warren, "Introduction to the IBM Los Gatos Logic Simulation Machine," Proc 1983 ICCCD, pp 580-583.
-
(1983)
Proc ICCCD
, pp. 580-583
-
-
Howard, J.K.1
Malm, R.L.2
Warren, L.M.3
-
28
-
-
85053456628
-
Using the IBM los gatos simulation machine
-
Howard, J K et al, "Using the IBM Los Gatos Simulation Machine," Proc 1983 Design Automation Conf, pp 592-594.
-
(1983)
Proc Design Automation Conf
, pp. 592-594
-
-
Howard, J.K.1
-
30
-
-
0021572587
-
Time first evaluation algorithm for high-speed logic simulation
-
Ishiura, N et al, "Time First Evaluation Algorithm for High-Speed Logic Simulation," Proc 1984ICCAD, pp 197-199.
-
(1984)
Proc ICCAD
, pp. 197-199
-
-
Ishiura, N.1
-
31
-
-
0022224771
-
High-speed logic simulation on a vector processor
-
Ishiura, N, et al, "High-Speed Logic Simulation on a Vector Processor," Proc 1985 IC CAD, pp 119-121.
-
(1985)
Proc IC CAD
, pp. 119-121
-
-
Ishiura, N.1
-
33
-
-
84976728787
-
Virtual time
-
July
-
Jefferson, D R, "Virtual Time," ACM Trans, on Programming Languages and Systems, vol. 7, no. 3, July 1985, pp 404-425.
-
(1985)
ACM Trans, on Programming Languages and Systems
, vol.7
, Issue.3
, pp. 404-425
-
-
Jefferson, D.R.1
-
34
-
-
84987237119
-
Software support for the yorktown simulation engine
-
Kronstadt, E, and G Pfister, "Software Support for the Yorktown Simulation Engine," Proc 1982 Design Automation Conf., pp 60-64.
-
(1982)
Proc Design Automation Conf
, pp. 60-64
-
-
Kronstadt, E.1
Pfister, G.2
-
35
-
-
84939064847
-
A high speed logic simulation machine
-
Koike, N et al, "A High Speed Logic Simulation Machine," Proc. 1983 COMPCON, pp 446-451.
-
(1983)
Proc. COMPCON
, pp. 446-451
-
-
Koike, N.1
-
36
-
-
0022243596
-
MAN-YO: A special purpose parallel machine for logic design automation
-
Koike, N and K Ohmori, "MAN-YO: A Special Purpose Parallel Machine for Logic Design Automation", Proc 1985 Parallel Processing Conf., pp 583-590.
-
(1985)
Proc Parallel Processing Conf
, pp. 583-590
-
-
Koike, N.1
Ohmori, K.2
-
37
-
-
85061080573
-
Vector coding techniques for high speed digital simulation
-
Krohn, H, "Vector Coding Techniques for High Speed Digital Simulation," Proc 1981 Design Automation Conf., pp 525-529.
-
(1981)
Proc Design Automation Conf
, pp. 525-529
-
-
Krohn, H.1
-
38
-
-
0020269997
-
Special-purpose computer for logic simulation using distributed processing
-
Dec
-
Levendel, Y H, P R Menon and S H Patel, "Special-Purpose Computer for Logic Simulation Using Distributed Processing," Bell System Technical Journal, vol 61, no 10, Dec 1982, pp 2873-2909.
-
(1982)
Bell System Technical Journal
, vol.61
, Issue.10
, pp. 2873-2909
-
-
Levendel, Y.H.1
Menon, P.R.2
Patel, S.H.3
-
39
-
-
0022148158
-
A distributed drafting algorithm for load balancing
-
Oct
-
Lionel, M, Chong-Wei Xu, and T B Gendreau, "A Distributed Drafting Algorithm for Load Balancing," IEEE Trans, on Software Engineering, vol. SE-11, no. 10, Oct. 1985, pp 1153-1161.
-
(1985)
IEEE Trans, on Software Engineering
, vol.SE-11
, Issue.10
, pp. 1153-1161
-
-
Lionel, M.1
Xu, C.-W.2
Gendreau, T.B.3
-
40
-
-
85053442361
-
Low cost hardware logic simulator/fault grade machine
-
Marino, J T, "Low Cost Hardware Logic Simulator/Fault Grade Machine," Proc 1984 Custom IC Conf., pp 242-244.
-
(1984)
Proc Custom IC Conf
, pp. 242-244
-
-
Marino, J.T.1
-
41
-
-
84948597945
-
Speed up techniques of logic simulation
-
Miyoshi, M et al, "Speed Up Techniques of Logic Simulation," Proc 1985 Design Automation Conf, pp 812-815.
-
(1985)
Proc Design Automation Conf
, pp. 812-815
-
-
Miyoshi, M.1
-
42
-
-
0021558407
-
Block level hardware logic simulator - It's application and results
-
Nomizu, N et al, "Block Level Hardware Logic Simulator - It's Application and Results," Proc ICCAD 84, pp 254-256.
-
Proc ICCAD
, vol.84
, pp. 254-256
-
-
Nomizu, N.1
-
43
-
-
84956443367
-
Data flow concepts speed simulation in cae systems
-
Jan
-
Paseman, W G, "Data Flow Concepts Speed Simulation in CAE Systems," Computer Design, Jan. 1985, pp 131-140.
-
(1985)
Computer Design
, pp. 131-140
-
-
Paseman, W.G.1
-
44
-
-
84987212835
-
The yorktown simulation engine: Introduction
-
Pfister, G F, "The Yorktown Simulation Engine: Introduction," Proc 1983 Design Automation Conf., pp 51-54.
-
(1983)
Proc Design Automation Conf
, pp. 51-54
-
-
Pfister, G.F.1
-
45
-
-
84939017588
-
Efficient event manipulation, a key to large scale simulation
-
Phillips, N D, and J G Tellier, "Efficient Event Manipulation, A Key to Large Scale Simulation," Proc. 1978 IEEE Cherry Hill Test Conf., pp 266-273.
-
(1978)
Proc. IEEE Cherry Hill Test Conf
, pp. 266-273
-
-
Phillips, N.D.1
Tellier, J.G.2
-
46
-
-
84939324421
-
A simulation engine in the design environment part i: Normal simulation methodology and results
-
Nov
-
Rezac, R R and L T Smith, "A Simulation Engine in the Design Environment Part I: Normal Simulation Methodology and Results," VLSI Design, Nov 1984, pp 96-102.
-
(1984)
VLSI Design
, pp. 96-102
-
-
Rezac, R.R.1
Smith, L.T.2
-
47
-
-
0020504121
-
HAL: A block level hardware logic simulator
-
Sasaki, T et al, "HAL: A Block Level Hardware Logic Simulator," Proc 1983 Design Automation Conf., pp 150-156.
-
(1983)
Proc Design Automation Conf
, pp. 150-156
-
-
Sasaki, T.1
-
48
-
-
85053437890
-
Sequent press release
-
July 15
-
Sequent press release, Electronic News, July 15, 1985, p 28.
-
(1985)
Electronic News
, pp. 28
-
-
-
50
-
-
0020177251
-
Cache memories
-
Sept
-
Smith, A J, "Cache Memories," Computing Surveys, vol 13, no. 3, Sept. 1982, pp 473-530.
-
(1982)
Computing Surveys
, vol.13
, Issue.3
, pp. 473-530
-
-
Smith, A.J.1
-
51
-
-
0022582065
-
The post office - Communication support for distributed ensemble architectures
-
Submitted to the
-
Stevens, K S et al, "The POST OFFICE - Communication Support for Distributed Ensemble Architectures," Submitted to the 1986 Distributed Computing Symposium.
-
(1986)
Distributed Computing Symposium
-
-
Stevens, K.S.1
-
52
-
-
9144229549
-
Digital logic simulation in a time based table driven environment
-
March
-
Szygenda, S A and E W Thompson, "Digital Logic Simulation in a Time Based Table Driven Environment," Computer, March 1975, pp 38-49
-
(1975)
Computer
, pp. 38-49
-
-
Szygenda, S.A.1
Thompson, E.W.2
-
53
-
-
0017269862
-
Modelling and digital simulation for design verification and diagnosis
-
Dec
-
Szygenda, S A and E W Thompson, "Modelling and Digital Simulation for Design Verification and Diagnosis," IEEE Trans on Computers, Dec. 1976, pp 1242-1253.
-
(1976)
IEEE Trans on Computers
, pp. 1242-1253
-
-
Szygenda, S.A.1
Thompson, E.W.2
-
54
-
-
85053438978
-
The crowded world of 32-bit microprocessors
-
Oct. 15
-
Tsantes, S, "The Crowded World of 32-bit Microprocessors," Electronics Business, Oct. 15, 1985, pp 63-66.
-
(1985)
Electronics Business
, pp. 63-66
-
-
Tsantes, S.1
-
55
-
-
0018018830
-
Event manipulation for discrete simulation requiring large numbers of events
-
Ulrich, E, "Event Manipulation for Discrete Simulation Requiring Large Numbers of Events," Communications of the ACM, Sept. 1978, pp 777-785.
-
(1978)
Communications of the ACM, Sept
, pp. 777-785
-
-
Ulrich, E.1
-
56
-
-
85050937494
-
Table lookup techniques for fast and flexible digital logic simulation
-
Ulrich, E, "Table Lookup Techniques for Fast and Flexible Digital Logic Simulation," Proc 1980 Design Automation Conf., pp 560-563.
-
(1980)
Proc Design Automation Conf
, pp. 560-563
-
-
Ulrich, E.1
-
57
-
-
85053440604
-
High-speed concurrent fault simulation with vectors and scalars
-
Ulrich, E. et al, "High-Speed Concurrent Fault Simulation with Vectors and Scalars," Proc 1983 Design Automation Conf., pp 709-712.
-
Proc 1983 Design Automation Conf
, pp. 709-712
-
-
Ulrich, E.1
-
58
-
-
85053468066
-
Logic simulator survey
-
March
-
VLSI Design Staff, "Logic Simulator Survey," VLSI Design, March, 1985, p 74.
-
(1985)
VLSI Design
, pp. 74
-
-
-
59
-
-
85053465508
-
Review of hardware simulation
-
August
-
VLSI Design Staff, "Review of Hardware Simulation," VLSI Design, August, 1985, pp 122-123.
-
(1985)
VLSI Design
, pp. 122-123
-
-
-
60
-
-
85053465780
-
1986 survey of logic simulators
-
February
-
VLSI Systems Design Staff, "1986 Survey of Logic Simulators," VLSI Systems Design, February, 1986, pp 32-40.
-
(1986)
VLSI Systems Design
, pp. 32-40
-
-
|