VLSI implementation of genetic four-step search for block matching algorithm

IEEE Transactions on Consumer Electronics

Volumn 49, Issue 4, 2003, Pages 1474-1481

  Wu, Angus ^a   So, Sammy ^b  

^a CITY UNIVERSITY OF HONG KONG   (Hong Kong)

^b Solomon Systech Limited   (China)

Author keywords

Block matching algorithm; FPGA; VLSI

Indexed keywords

COMPUTATIONAL METHODS; FIELD PROGRAMMABLE GATE ARRAYS; GENETIC ALGORITHMS; IMAGE COMPRESSION; LEAST SQUARES APPROXIMATIONS; MOTION ESTIMATION; MULTIMEDIA SYSTEMS; OPTIMIZATION;

BLOCK MATCHING ALGORITHM; MEAN SQUARE ERROR;

VLSI CIRCUITS;

EID: 84988289865     PISSN: 00983063     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCE.2003.1261256     Document Type: Article

References (8)

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