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Volumn 9720, Issue , 2016, Pages

All-IP-Ethernet architecture for real-time sensor-fusion processing

Author keywords

All IP architecture; deep learning; real time machine learning; Sensor fusion; TCP

Indexed keywords

ARTIFICIAL INTELLIGENCE; COMPUTER ARCHITECTURE; DATA HANDLING; ETHERNET; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INFORMATION SCIENCE; LEARNING SYSTEMS; MEDICAL IMAGING; NETWORK ARCHITECTURE; NETWORK LAYERS; NETWORKS (CIRCUITS); RECONFIGURABLE HARDWARE; SENSOR DATA FUSION; SPECTROSCOPY;

EID: 84982156068     PISSN: 0277786X     EISSN: 1996756X     Source Type: Conference Proceeding    
DOI: 10.1117/12.2212016     Document Type: Conference Paper
Times cited : (7)

References (6)
  • 1
    • 84982082083 scopus 로고    scopus 로고
    • http://www.electronicproducts.com/Analog-Mixed-Signal-ICs/Standard-Linear/The-incredible-vers atile-op-amp-in-medical-apps.aspx
  • 2
    • 84982082065 scopus 로고    scopus 로고
    • http://www.jst.go.jp/impact/en/program02.html
  • 3
    • 84982082062 scopus 로고    scopus 로고
    • OCHA-7: Parallel computer based on memory string architecture
    • Ryuta Niino, Takashi Matsumoto and Kei Hiraki, "OCHA-7: Parallel computer Based on Memory String Architecture, Proc. SIG-ARC, IPSJ, 125-27, pp. 151-156 (1997).
    • (1997) Proc. SIG-ARC IPSJ 125-27 , pp. 151-156
    • Niino, R.1    Matsumoto, T.2    Hiraki, K.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.