Verification tools for finite-state concurrent systems

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 803 LNCS, Issue , 1994, Pages 124-175

  Clarke, E ^a   Grumberg, O ^b   Long, D ^c  

^a CARNEGIE MELLON UNIVERSITY   (United States)

^b TECHNION ISRAEL INSTITUTE OF TECHNOLOGY   (Israel)

^c LUCENT TECHNOLOGIES   (United States)

Author keywords

Automatic verification; Binary decision diagrams; Model checking; Temporal logic

Indexed keywords

BINARY DECISION DIAGRAMS; BOOLEAN FUNCTIONS; COMPUTER CIRCUITS; SPECIFICATIONS; TEMPORAL LOGIC;

AUTOMATIC TECHNIQUE; AUTOMATIC VERIFICATION; BACKGROUND INFORMATION; FINITE-STATE CONCURRENT SYSTEM; LOGIC MODEL CHECKING; STATE TRANSITION GRAPHS; TRANSITION RELATIONS; VERIFICATION TOOLS;

MODEL CHECKING;

EID: 84981282575     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-58043-3_19     Document Type: Conference Paper

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