Minimizing completion time for loop tiling with computation and communication overlapping

Proceedings - 15th International Parallel and Distributed Processing Symposium, IPDPS 2001

Volumn , Issue , 2001, Pages

  Goumas, G ^a   Sotiropoulos, A ^a   Koziris, N ^a  

^a NATIONAL TECHNICAL UNIVERSITY OF ATHENS   (Greece)

Author keywords

communication overlapping; hyperplanes; Loop tiling; MPI send receive primitives; supernodes

Indexed keywords

CACHE MEMORY; GEOMETRY; ITERATIVE METHODS; PARALLEL PROCESSING SYSTEMS;

COMPLETION TIME; COMPUTATION AND COMMUNICATION OVERLAPPING; HYPERPLANES; ITERATION SPACES; LOOP TILING; MPI SEND-RECEIVE PRIMITIVES; SUPERNODES; TOTAL COMPLETION TIME;

PIPELINE PROCESSING SYSTEMS;

EID: 84981274197     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2001.924976     Document Type: Conference Paper

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