Compact delay model for series-connected MOSFETs

GLSVLSI 2002 - Proceedings of the 12th ACM Great Lakes Symposium on VLSI

Volumn , Issue , 2002, Pages 37-40

  Shakeri, Kaveh ^a   Meindl, James D ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

VLSI CIRCUITS;

ACCURATE PREDICTION; DELAY MODELING; DEVICE PARAMETERS; DYNAMIC LOGIC; GENERATIONS OF TECHNOLOGY; LOGIC FAMILIES; RELATIVE DELAY; SERIES-CONNECTED;

MOSFET DEVICES;

EID: 84978914152     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/505306.505315     Document Type: Conference Paper

References (4)

1. T. Sakurai and A. R. Newton, "Delay Analysis of Series-Connected MOSFET Circuits," IEEE J. Solid-State Circuits, Vol. 26, NO. 2, Feb. 1991.
2. T. Sakurai and A. R. Newton, "Alpha-power model and its applications to CMOS inverter delay," IEEE J. Solid-State Circuits, Vol. 25, pp. 584-594, Apr 1990.
3. K. A. Bowman, B. Austin, J. Eble, X. Tang and J. D. Meindl, "A Physical Alpha-Power Law MOSFET Model," IEEE J. Solid-State Circuits, Vol. 34, No. 10, Oct 1999.
4. Elmore, W. C.,"The transient response of damped linear networks with particular regard to wide-band amplifiers," J. Applied Physics, Vol. 19, 1948.