Lynx: Using OS and hardware support for fast fine-grained inter-core communication

Proceedings of the International Conference on Supercomputing

Volumn 01-03-June-2016, Issue , 2016, Pages

  Mitropoulou, Konstantina ^a   Porpodas, Vasileios ^a,b   Zhang, Xiaochun ^a   Jones, Timothy M ^a  

^a UNIVERSITY OF CAMBRIDGE   (United Kingdom)

^b INTEL CORPORATION   (United States)

Author keywords

Fine grained Communication; Hardware exceptions; Single consumer software queue; Single producer

Indexed keywords

DATA TRANSFER; HARDWARE; INTELLIGENT CONTROL; RECONFIGURABLE HARDWARE;

COMMODITY PROCESSORS; FINE GRAINED; INTER-CORE COMMUNICATIONS; MAINTENANCE OPERATIONS; SINGLE-CONSUMER SOFTWARE QUEUE; SINGLE-PRODUCER; SOFTWARE PARALLELISM; STREAMING APPLICATIONS;

QUEUEING THEORY;

EID: 84978518653     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2925426.2926274     Document Type: Conference Paper

References (28)

1. GCC: Gnu Compiler Collection. http://gcc.gnu.org.
2. NAS Parallel Benchmarks. http://www.nas.nasa.gov/publications/npb.html.
3. The LLVM Compiler Infrastructure. http://llvm.org.
4. Intel 64 and IA-32 Architectures Software Developer's Manual. 2015.
5. M. Abadi, T. Harris, and M. Mehrara. Transactional Memory with Strong Atomicity Using Off-the-shelf Memory Protection Hardware. In Proceedings of the 14th Symposium on Principles and Practice of Paral- lel Programming (PPoPP), 2009.
6. A. W. Appel and K. Li. Virtual Memory Primitives for User Programs. In Proceedings of the 4th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS IV), 1991.
7. K. Gharachorloo and P. B. Gibbons. Detecting Violations of Sequential Consistency. In Proceedings of the 3rd Annual Symposium on Parallel Algorithms and Architectures (SPAA), 1991.
8. J. Giacomoni, T. Moseley, and M. Vachharajani. Fast- Forward for Efficient Pipeline Parallelism: A Cache- Optimized Concurrent Lock-free Queue. In Proceedings of the 13th Symposium on Principles and Practice of Parallel Programming (PPoPP), 2008.
9. M. Girkar and C. D. Polychronopoulos. Automatic Extraction of Functional Parallelism from Ordinary Programs. Transactions on Parallel and Distributed Systems, 3(2), 1992.
10. M. P. Herlihy and J. M. Wing. Linearizability: A Correctness Condition for Concurrent Objects. Transactions on Programming Languages and Systems, 12(3), 1990.
11. T. B. Jablin, Y. Zhang, J. A. Jablin, J. Huang, H. Kim, and D. I. August. Liberty Queues for EPIC Architectures. In Proceedings of EPIC Workshop, 2010.
12. M. Kim, H. Kim, and C.-K. Luk. SD3: A Scalable Approach to Dynamic Data-Dependence Profiling. In Proceedings of the 43rd Annual International Symposium on Microarchitecture (MICRO 43), 2010.
13. E. Ladan-Mozes and N. Shavit. An Optimistic Approach to Lock-Free FIFO Queues. Distributed Computing, 20(5), 2007.
14. L. Lamport. Specifying Concurrent Program Modules. Transactions on Programming Languages and Systems, 5(2), 1983.
15. P. P. C. Lee, T. Bu, and G. Chandranmenon. A Lock- Free, Cache-Efficient Shared Ring Buffer for Multi-Core Architectures. In Proceedings of the 5th Symposium on Architectures for Networking and Communications Systems (ANCS), 2009.
16. P. P. C. Lee, T. Bu, and G. Chandranmenon. A Lock-Free, Cache-Efficient Multi-Core Synchronization Mechanism for Line-Rate Network Traffic Monitoring. In International Parallel and Distributed Processing Symposium (IPDPS), 2010.
17. S. Lee, D. Tiwari, Y. Solihin, and J. Tuck. HAQu: Hardware-Accelerated Queueing for Fine- Grained Threading on a Chip Multiprocessor. In 17th International Symposium on High Performance Com- puter Architecture (HPCA), 2011.
18. M. M. Michael and M. L. Scott. Nonblocking Algorithms and Preemption-Safe Locking on Multipro- grammed Shared Memory Multiprocessors. Journal of Parallel and Distributed Computing, 51(1), 1998.
19. M. Moir, D. Nussbaum, O. Shalev, and N. Shavit. Using Elimination to Implement Scalable and Lock-Free FIFO Queues. In Proceedings of the 17th Annual Symposium on Parallelism in Algorithms and Architectures (SPAA), 2005.
20. G. Ottoni, R. Rangan, A. Stoler, and D. I. August. Automatic Thread Extraction with Decoupled Software Pipelining. In Proceedings of the 38th Annual Interna- tional Symposium on Microarchitecture (MICRO 38), 2005.
21. S. Prakash, Y. H. Lee, and T. Johnson. A Nonblock- ing Algorithm for Shared Queues Using Compare-and- Swap. Transactions on Computers, 43(5), 1994.
22. W. N. Scherer, III, D. Lea, and M. L. Scott. Scalable Synchronous Queues. In Proceedings of the 11th Symposium on Principles and Practice of Parallel Programming (PPoPP), 2006.
23. P. Tsigas and Y. Zhang. A Simple, Fast and Scal- able Non-blocking Concurrent FIFO Queue for Shared Memory Multiprocessor Systems. In Proceedings of the 13th Annual Symposium on Parallel Algorithms and Architectures (SPAA), 2001.
24. C. Wang, H. S. Kim, Y. Wu, and V. Ying. Compiler- Managed Software-based Redundant Multi-Threading for Transient Fault Detection. In International Symposium on Code Generation and Optimization (CGO), 2007.
25. C. C. Wang and Y. Wu. Apparatus and Method for Redundant Software Thread Computation. 2010. US Patent 7,818,744.
26. J. Wang, K. Zhang, X. Tang, and B. Hua. B-Queue: Efficient and Practical Queuing for Fast Core-to-Core Communication. International Journal of Parallel Pro- gramming, 41(1), 2012.
27. E. Witchel, J. Cates, and K. Asanović. Mondrian memory protection. In Proceedings of the 10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS X), 2002.
28. Y. Zhang, J. W. Lee, N. P. Johnson, and D. I. August. DAFT: Decoupled Acyclic Fault Tolerance. In Proceedings of the 19th International Conference on Paral- lel Architectures and Compilation Techniques (PACT), 2010.