Software Prefetching

ACM SIGPLAN Notices

Volumn 26, Issue 4, 1991, Pages 40-52

  Callahan, David ^a   Kennedy, Ken ^b   Porterfield, Allan ^a  

^a CRAY INC   (United States)

^b RICE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 84976722352     PISSN: 03621340     EISSN: 15581160     Source Type: Journal    
DOI: 10.1145/106973.106979     Document Type: Article

References (13)

1. M. Berry, D. Chen, D. Kuck, S. Lo, Y. Pang, L. Pointer, R. Roloff, A. Samah, E. Clementi, S. Chin, D. Schneider, G. Fox, P. Messina, D. Walker, C. Hsiung, J. Schwarzmeier, K. Lue, S. Orszag, F. Seidl, O. Johnson, R. Goodrum, and J. Martin. The Perfect Club: Effective Performance Evaluation of Supercomputers. The International Journal of Supercomputer Applications, 3(3), Fall 1989.
2. Gregory Chaitin, Marc Auslander, Ashok Chandra, John Cocke, Martin Hopkins, and Peter Markstein. Register allocation via coloring. Computing Languages, 6, 1981.
3. Gregory Chaitin. Register allocation and spilling via graph coloring. In Proceedings of the SIGPLAN 82 Symposium on Compiler Construction, 1982.
4. Steve Carr and Ken Kennedy. Blocking linear algebra codes for memory hierarchies. In Proceedings of the Fourth SIAM Conference on Parallel Processing for Scientific Computing, Chicago, December 1989.
5. David Callahan, Ken Kennedy, and Steve Carr. Improving register allocation for subscripted variables. In Proceedings of the ACM SIGPLAN 90 Conference on Program Language Design and Implementation, pages 53-65, White Plains, NY, June 1990.
6. David Callahan, Ken Kennedy, and Allan Porterfield. Analyzing and visualizing performance of memory heirarchies. In Margaret Simmons and Rebecca Koskela, editors, Instrumentation for Visualization, Frontier Series, pages 1-26. ACM Press, 1990.
7. David Callahan and Allan Porterfield. Data Cache Performance of Supercomputer Applications. In Supercomputer 90, 1990.
8. Jack Dongarra. Performance of Various Computers Using Standard Linear Equations Software in a Fortran Environment. Computer Architecture News, 16(1), March 1988.
9. C. E. Gimac and V. M. Milutinovic. A survey of RISC processors and computers of the mid-1980's. Computer, 20(9), September 1987.
10. Norman Jouppi. Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers. In The 14th Annual International Symposium on Computer Architecture, Seattle, WA, May 1990.
11. David Kroft. Lockup-free instruction fetch/prefetch cache organization. In The 8th Annual International Symposium on Computer Architecture, Minneapolis, MN, May 1990.
12. Allan Porterfield. Software Methods for Improvement of Cache Performance on Supercomputer Applications. PhD thesis, Rice University, 1989. Technical Report Number Rice COMP TR89-93.
13. C. Scheurich and M. Dubois. Concurrent miss resolution in multiprocessor caches. In 1988 International Conference on Parallel Processing, 1988.