An Evaluation of the Chandy-Misra-Bryant Algorithm for Digital Logic Simulation

ACM Transactions on Modeling and Computer Simulation (TOMACS)

Volumn 1, Issue 4, 1991, Pages 308-347

  Soulé, Larry ^a   Gupta, Anoop ^a  

^a Computer Systems Laboratory ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 84976711937     PISSN: 10493301     EISSN: 15581195     Source Type: Journal    
DOI: 10.1145/130611.130613     Document Type: Article

References (29)

1. BAILEY, M., AND SNYDER, L. An empirical study of on-chip parallelism. In The 25th Design Automation Conference. ACM/IEEE, New York, 1988, pp. 160-165.
2. BLANK, T. A survey of hardware accelerators used in computer-aided design. IEEE Des. Test Comput. (Aug 1984), 21-39.
3. BRINER, J. V., JR, ELLIS, J. L., AND KEDEM, G. Breaking the barrier of parallel simulation of digital systems. in The 28th Design Automation Conference ACM/IEEE, New York, 1991, pp. 223-226.
4. BRYANT, R E. Simulation of packet communication architecture computer systems. Tech. Rep. MIT-LCS-TR-188, MIT, Cambridge, Mass., 1977.
5. CHANDY, K. M., AND MISRA, J. Asynchronous distributed simulation via a sequence of parallel computations. Commun. ACM 24, 11 (Nov. 1981), 198-206.
6. DAVIS, H., GOLDSCHMIDT, S., AND HENNESSY, J. Multiprocessing simulation and tracing using Tango. In Proceedings of the International Conference on Parallel Processing 1991.
7. DIEDE, T, HAGENMAIER, C., MIRANKER, G., RUBINSTEIN, J, AND WORLEY, W The Titan graphics supercomputer architecture. IEEE Comput. 21, 9 (Sept. 1988), 13-30.
8. FRANK, ? Exploiting parallelism in a switch-level simulation machine. In The 23rd Design Automation Conference. ACM/IEEE, New York, 1986, pp. 20-26.
9. FUJIMOTO, R. Lookahead in parallel discrete event simulation. In The 1988 International Conference on Parallel Processing. 1988, pp. 34-41.
10. SMITH, R., SMITH, J., AND SMITH, K. Faster architectural simulation through parallelism In The 24th Design Automation Conference ACM/IEEE, New York, 1987, pp. 189-194.
11. JEFFERSON, D. Virtual time. ACM Trans. Progr. Lang. 7, 3 (July 1985), 404-425.
12. Ku, D., AND DEMICHELI, G. Hercules-A system for high-level synthesis. In The 25th Design Automation Conference. ACM/IEEE, New York, 1988, pp. 483-488.
13. LENOSKI, D., LAUDON, J., GHARACHORLOO, K. GUPTA, A., AND HENNESSY, J. Directory based cache coherence protocol for the Dash multiprocessor. In Proceedings of the 17th International Symposium on Computer Architecture. 1990, pp. 148-159.
14. LIN, Y.-B., LAZOWSKA, E. D., AND BAILEY, M. L. Comparing synchronization protocols for parallel logic-level simulation. Tech. Rep. 89-09-06, Dept. of Computer Science and Engineering, Umv of Washington, 1989.
15. MAURER, P. M., AND WANG, Z. Techniques for unit-delay compiled simulation. In The 27th Design Automation Conference. ACM/IEEE, New York, 1990, pp. 480-484.
16. MISRA, J. Distributed discrete-event simulation. ACM Comput. Surv. 18, 1 (Mar. 1986), 39-65.
17. PFISTER, G. The Yorktown simulation engine: Introduction. In The 19th Design Automation Conference. ACM/IEEE, New York, 1982, pp. 7.1.
18. REYNOLDS, P. F. A shared resource algorithm for distributed simulation. In Proceedings of the 9th International Symposium on Computer Architecture. 1982, pp. 259-266.
19. SMITH, R. J. Fundamentals of parallel logic simulation. In The 23rd Design Automation Conference. ACM/IEEE, New York, 1986, pp. 2-12.
20. SOULE, L., AND BLANK, T. Statistics for parallelism and abstraction level in digital simulation. In Proceedings of the 24th Design Automation Conference. ACM/IEEE, New York, 1987, pp. 588-591.
21. SOULE, L., AND BLANK, T. Parallel logic simulation on general purpose machines. In Proceedings of the 25th Design Automation Conference. ACM/IEEE, New York, 1988, pp. 166-171.
22. SOULE, L., AND GUPTA, A. Characterization of parallelism and deadlocks in distributed digital logic simulation. In Proceedings of the 26th Design Automation Conference. ACM/IEEE, New York, 1989. pp. 81-86.
23. SOULE, L., AND GUPTA, A. Parallel distributed-time logic simulation, IEEE Des. Test Comput. 6, 6 (Dec. 1989), 32-48.
24. Su, W.-K. Reactive-process programming and distributed discrete event-simulation. Ph.D. thesis, California Institute of Technology, 1989.
25. WAGNER, D., LAZOWSKA, E., AND BERSHAD, B. Techniques for efficient shared-memory parallel simulation. Tech. Rep. 88-04-05, Univ. of Washington, Dept. of Computer Science, 1988.
26. WANG, L.-T., HOOVER, N., PORTER, E., AND ZASIO, J. SSIM: A software levelized compiled-code simulator. In The 24th Design Automation Conference. ACM/IEEE, New York, 1987, pp. 2-8.
27. WANG, Z., AND MAURER, P. M. LECSIM: A levelized event driven compiled logic simulator. In 27th Design Automation Conference. ACM/IEEE, New York, 1990, pp. 491-496.
28. WILSON, A. Parallelization of an event driven simulator on the Encore Multimax. Tech. Rep. ETR 86-005, Encore Computer, 1986.
29. WONG, F. Statistics on logic simulation. In The 23rd Design Automation Conference. ACM/IEEE, New York, 1986, pp. 13-19.