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Volumn 29, Issue 6, 1994, Pages 49-60

Link-time optimization of address calculation on a 64-bit architecture

Author keywords

[No Author keywords available]

Indexed keywords


EID: 84976710092     PISSN: 03621340     EISSN: 15581160     Source Type: Journal    
DOI: 10.1145/773473.178248     Document Type: Article
Times cited : (13)

References (6)
  • 1
    • 84976813398 scopus 로고
    • Digital Equipment Corporation
    • section 3.2.3: “Name Resolution.” Digital Equipment Corporation
    • Digital Equipment Corporation. DEC OSF/1 Programmer's Guide, section 3.2.3: “Name Resolution.” Digital Equipment Corporation, 1993.
    • (1993) DEC OSF/1 Programmer's Guide
  • 2
    • 0023859649 scopus 로고
    • The Scalable Processor Architecture (SPARC)
    • March
    • Robert B. Garner, et al. The Scalable Processor Architecture (SPARC). Digest of Papers: Compcon 88, pp. 278-283, March 1988.
    • (1988) Digest of Papers: Compcon 88 , pp. 278-283
    • Garner, R.B.1
  • 3
    • 84976714665 scopus 로고
    • MIPS R2000 Risc Architecture. Prentice Hall
    • Gerry Kane. MIPS R2000 Risc Architecture. Prentice Hall, 1987.
    • (1987)
    • Kane, G.1
  • 4
    • 84976820478 scopus 로고
    • ed. Alpha Architecture Reference Manual. Digital Press
    • Richard L. Sites, ed. Alpha Architecture Reference Manual. Digital Press, 1992.
    • (1992)
    • Sites, R.L.1
  • 6
    • 84976692354 scopus 로고
    • Amitabh Srivastava and David W
    • Wall. A practical system for intermodule code optimization at link-time. Journal of Programming Languages 1(1), pp. 1-18, March 1993. Also available as WRL Research Report 92/6, December
    • Amitabh Srivastava and David W. Wall. A practical system for intermodule code optimization at link-time. Journal of Programming Languages 1(1), pp. 1-18, March 1993. Also available as WRL Research Report 92/6, December 1992.
    • (1992)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.