-
2
-
-
0019398205
-
Register allocation via coloring
-
Gregory J. Chaitin, Marc A. Auslander, Ashok K. Chandra, John Cocke, Martin E. Hopkins, and Peter W. Markstein. Register allocation via coloring. Computer Languages 6. 47-57, 1981.
-
(1981)
Computer Languages
, vol.6
, pp. 47-57
-
-
Chaitin, G.J.1
Auslander, M.A.2
Chandra, A.K.3
Cocke, J.4
Hopkins, M.E.5
Markstein, P.W.6
-
3
-
-
84976815037
-
Register allocation & spilling via graph coloring
-
Published as SIGPLAN Notices
-
G. J. Chaitin. Register allocation & spilling via graph coloring. Proceedings of the SIGPLAN '82 Symposium on Compiler Construction, pages 98–105. Published as SIGPLAN Notices 77(6), June 1982.
-
(1982)
Proceedings of the SIGPLAN '82 Symposium on Compiler Construction
, vol.77
, Issue.6
, pp. 98-105
-
-
Chaitin, G.J.1
-
5
-
-
0040815246
-
Performance of various computers using standard linear equations software in a Fortran environment
-
December
-
Jack J. Dongarra. Performance of various computers using standard linear equations software in a Fortran environment. Computer Architecture News 11 (5): 22-27, December 1983.
-
(1983)
Computer Architecture News
, vol.11
, Issue.5
, pp. 22-27
-
-
Dongarra, J.J.1
-
6
-
-
84976736522
-
gprof: a call graph execution profiler
-
Published as SIGPLAN Notices
-
Susan L. Graham, Peter B. Kessler, and Marshall K. McKusick. gprof: a call graph execution profiler. Proceedings of the SIGPLAN '82 Symposium on Compiler Construction, pages 120-126. Published as SIGPLAN Notices 17 (6), June 1982.
-
(1982)
Proceedings of the SIGPLAN '82 Symposium on Compiler Construction
, vol.17
, Issue.6
, pp. 120-126
-
-
Graham, S.L.1
Kessler, P.B.2
McKusick, M.K.3
-
8
-
-
0020502887
-
Design of a high performance VLSI processor
-
Randal Bryant, editor
-
John L. Hennessy, Norman P. Jouppi, Steven Przybylski, Christopher Rowen, and Thomas Gross. Design of a high performance VLSI processor. In Randal Bryant, editor, Third Caltech Conference on Very Large Scale Integration, pages 33–54. Computer Science Press, 11 Taft Court, Rockville, Maryland.
-
Third Caltech Conference on Very Large Scale Integration
, pp. 33-54
-
-
Hennessy, J.L.1
Jouppi, N.P.2
Przybylski, S.3
Rowen, C.4
Gross, T.5
-
9
-
-
0021817378
-
Reduced instruction set computers
-
January
-
David A. Patterson. Reduced instruction set computers. Communications of the ACM 28 (1): 8-21, January 1985.
-
(1985)
Communications of the ACM
, vol.28
, Issue.1
, pp. 8-21
-
-
Patterson, D.A.1
-
11
-
-
84939735083
-
-
Laboratory for Computer Science, 545 Technology Square, Room 418, Cambridge, Massachusetts.
-
Christopher J. Terman. User's Guide to NET, PRESIM, and RNL/NL. M.I.T. Laboratory for Computer Science, 545 Technology Square, Room 418, Cambridge, Massachusetts.
-
User's Guide to NET, PRESIM, and RNL/NL. M.I.T.
-
-
Terman, C.J.1
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