SATSim: A superscalar architecture trace simulator using interactive animation

Proceedings of the 2000 Workshop on Computer Architecture Education, WCAE 2000

Volumn , Issue , 2000, Pages

  Wolff, Mark ^a   Wills, Linda ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANIMATION; EDUCATION;

BEHAVIORAL PATTERNS; BRANCH MISPREDICTIONS; COMPUTER ARCHITECTURE COURSE; HARDWARE CONFIGURATIONS; INTERACTIVE ANIMATIONS; ORDER COMMITMENT; OUT-OF-ORDER EXECUTION; SUPERSCALAR ARCHITECTURE;

COMPUTER ARCHITECTURE;

EID: 84976582937     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1275240.1275249     Document Type: Conference Paper

References (9)

1. nd. Ed., Morgan Kaufmann Publishers, 1996.
2. Flynn, M.J., "Computer Architecture Pipelined and Parallel Processor design," Jones and Bartlett Publishers, 1995.
3. Song, S.P., Denman, M., Chang, J., The PowerPC 604 RISC Microprocessor, IEEE Micro, October 1994, p.8-17.
4. Kessler, R.E., The Alpha 21264 Microprocessor, IEEE Micro, March 1999, p.24-36.
5. Yeager, K.C., The Mips R10000 Superscalar Microprocessor, IEEE Micro, April 1996, p.28-40.
6. Douglas C. Burger and Todd M. Austin, The SimpleScalar Tool Set, Version 2.0, Computer Architecture News, 25 (3), pp. 13-25, June, 1997
7. Moura, C., SuperDLX A Generic Superscalar Simulator, ACAPS Technical Memo 64, McGill University School of Computer Science.
8. DLXview, http://yara.ecn.purdue.edu/~teamaaa/dlxview/
9. Larry B. Hostetler & Brian Mirtich. DLXsim - A Simulator for DLX