Advanced self-organizing maps using binary weight vector and its digital hardware design

ICONIP 2002 - Proceedings of the 9th International Conference on Neural Information Processing: Computational Intelligence for the E-Age

Volumn 3, Issue , 2002, Pages 1330-1335

  Yamakawa, T ^a   Horio, K ^a   Hiratsuka, T ^a  

^a KYUSHU INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ARTIFICIAL INTELLIGENCE; BINS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; CONFORMAL MAPPING; DESIGN; HARDWARE; INFORMATION SCIENCE; LEARNING ALGORITHMS; RECONFIGURABLE HARDWARE;

BINARY DATA; CO-PROCESSORS; DIGITAL HARDWARE; DIGITAL HARDWARE DESIGN; INPUT VECTOR; PROCESSING TIME; WEIGHT VECTOR;

SELF ORGANIZING MAPS;

EID: 84968627153     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICONIP.2002.1202837     Document Type: Conference Paper

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