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Volumn 1998-April, Issue , 1998, Pages 520-525

Flip chip MPU module on high performance printed circuit board "aLIVH"

Author keywords

ALIVHTM; MCM (Multi Chip Module); MPU (Micro Processor Unit); SBBTM; technique

Indexed keywords

BONDING; CARBON DIOXIDE LASERS; CHIP SCALE PACKAGES; LSI CIRCUITS; MICROPROCESSOR CHIPS; MULTICHIP MODULES; PRINTED CIRCUIT BOARDS; SUBSTRATES; TIMING CIRCUITS;

EID: 84966652508     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICMCM.1998.670835     Document Type: Conference Paper
Times cited : (4)

References (6)
  • 1
    • 0027852055 scopus 로고
    • Advanced stud-bump-bonding technique for high density MCM
    • June
    • Y. Bessho, et al., "Advanced Stud-Bump-Bonding Technique for High Density MCM, Proceedings of 1993 Japan IEMT Symposium, PP.362-365, June 1993.
    • (1993) Proceedings of 1993 Japan IEMT Symposium , pp. 362-365
    • Bessho, Y.1
  • 3
    • 0029461216 scopus 로고
    • Performance of any layer ivh structure multi-layered Printed Wiring Board
    • December
    • T. Nishii, et al., "Performance of Any Layer IVH structure Multi-layered Printed Wiring Board", Ohmiya, Japan IEMT Symposium Proceedings of PP.93-96, December 1995.
    • (1995) Ohmiya, Japan IEMT Symposium Proceedings of , pp. 93-96
    • Nishii, T.1
  • 5
    • 1942495243 scopus 로고    scopus 로고
    • Device degradation induced by stud bumping above the MOS-FETs(1)
    • Extended Abstracts No.2 of PP. October
    • N. Shimoyama, et al., "Device degradation induced by stud bumping above the MOS-FETs(1)" Akita, Japan The 5gth Japan Society of Applied Physics, Extended Abstracts No.2 of PP.745, October 1997.
    • (1997) Akita, Japan the 5gth Japan Society of Applied Physics , pp. 745
    • Shimoyama, N.1
  • 6
    • 1942495244 scopus 로고    scopus 로고
    • A cofired bump bonding technique for chip-Scale-Package Fabrication Using Zero X-Y Shrinkage Low Temperature Cofired Ceramic Substrate
    • October
    • M. Itagaki, et al., "A Cofired Bump Bonding Technique for Chip-Scale-Package Fabrication Using Zero X-Y Shrinkage Low Temperature Cofired Ceramic Substrate", Philadelphia Pennsylvania, The 1997 International Symposium on Microelectronics, Proceedings of PP.685-690, October 1997.
    • (1997) Philadelphia Pennsylvania, the 1997 International Symposium on Microelectronics, Proceedings of , pp. 685-690
    • Itagaki, M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.