New aspects in high-level specification, verification, and design of IT protocols

Proceedings - 14th Symposium on Integrated Circuits and Systems Design, SBCCI 2001

Volumn , Issue , 2001, Pages 58-63

  Huemmer, H D ^a   Geisselhardt, W ^a  

^a UNIVERSITY OF DUISBURG ESSEN   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN; EMBEDDED SYSTEMS; HIGH LEVEL SYNTHESIS; INTEGRATED CIRCUITS; RECONFIGURABLE HARDWARE; SPECIFICATIONS; SYSTEMS ANALYSIS;

DESIGN METHODOLOGY; DESIGN PROCESS; FORMAL SPECIFICATION AND VERIFICATION; HIGH LEVEL SPECIFICATION; SLIDING WINDOW PROTOCOL; SYNTHESIS TOOL; VHDL MODELING; VHDL SIMULATION;

FORMAL SPECIFICATION;

EID: 84966441170     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SBCCI.2001.953004     Document Type: Conference Paper

References (9)

1. L. Lamport, "The Temporal Logic of Actions", ACM Transactions on Programming Languages and Systems, Nov. 1993, pp. 1-51.
2. P. Herrmann, H. Krumm, "Compositional Specification and Verification of High-Speed Transfer Protocols", Protocol Specification, Testing and Verification XIV, ed. Vuong and Chanson, Chapman & Hall, Vancouver, Canada, 1994. pp. 339-346.
3. G. Graw, P. Herrmann, H. Krumm, "Verification of UML-based real-time system designs by means of cTLA", Proc. 3rd IEEE Int. Symp. on Object-oriented Real-time distributed Computing - (ISORC2K), IEEE Computer Society Press, Newport Beach, CA, USA, March 2000, pp. 86-95.
4. P. Sanchez, V. Fernandez, "Test Synthesis of Digital Systems", Advanced Techniques for Embedded Systems, Design and Test, ed. Lopez, Hermida, Geisselhardt, Kluwer Academic Pub., 1998, chap. 9, pp. 204 ff.
5. O. Droegehorn, O. Terhorst, H.-D. Huemmer, W. Geisselhardt, "Formal Specification and Verification of Communication-Systems for Designing in VHDL", Proc. IEEE Int. High Level Design Validation and Test Workshop (HLDVT'98), La Jolla USA, 1998, pp. 164-171.
6. H.-D. Huemmer, W. Geisselhardt, "Converting Formal Specifications to Behavioral VHDL Models", Proc. Int. Conf. on Electrical, Electronics, Comm., and Information, CECI'2001, IECI, Jakarta (Indonesia), March 2001, pp. VI.28-32.
7. D. Henkel, T. Gerdsmeister, P.B. Ladkin, "Safely Sliding Windows", RVS Group Report RVS-RR-97-05a (5.5.1997) and The Specs., RVS-RR-97-05b (1.7.1997), University Bielefeld, Germany.
8. S. Owre, J.M. Rushby, N. Shankar, "PVS: A Prototype Verification System", 11th Int. Conf. on Automated Deduction (CADE), Lecture Notes in Artificial Intelligence, Vol. 607, Saratoga, NY, 1992, pp. 748-752.
9. D. Hutter, G. Rock, J. Siekmann et al, "Formal Software Development in the Verification Support Environment (VSE)", Proc. 13th Int. Florida Artificial Intelligence Res. Soc. Conf. (FLAIRS 2000), AAAI Press, Menlo Park, CA, Mai 2000, pp.367-376.