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Volumn , Issue , 1996, Pages 37-43

A low power current sensing scheme for CMOS SRAM

Author keywords

[No Author keywords available]

Indexed keywords

CLOCKS; DIFFERENTIAL AMPLIFIERS; ELECTRIC CURRENT CONTROL; STATIC RANDOM ACCESS STORAGE;

EID: 84966387154     PISSN: 10874852     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MTDT.1996.782489     Document Type: Conference Paper
Times cited : (7)

References (7)
  • 1
    • 0026141225 scopus 로고
    • Current-mode techniques for high-speed VLSI circuits with application to current sense amplifier for CMOS SRAM's
    • April
    • E. Seevinck, P. Beers, and H. Ontrop, "Current-Mode Techniques for High-Speed VLSI Circuits with Application to Current Sense Amplifier for CMOS SRAM's", IEEE J. Solid-State Circuits, vol. 26, No. 4, pp. 525-536, April, 1991.
    • (1991) IEEE J. Solid-State Circuits , vol.26 , Issue.4 , pp. 525-536
    • Seevinck, E.1    Beers, P.2    Ontrop, H.3
  • 2
    • 0026852658 scopus 로고
    • High-speed hybrid current-mode sense amplifier for CMOS SRAMs
    • April
    • P. Y. Chee, P. C. Liu, and L. Siek, "High-Speed Hybrid Current-Mode Sense Amplifier for CMOS SRAMs", Electronics Letters, vol. 28, No. 9, pp. 871-873, April, 1992.
    • (1992) Electronics Letters , vol.28 , Issue.9 , pp. 871-873
    • Chee, P.Y.1    Liu, P.C.2    Siek, L.3
  • 3
    • 0029640436 scopus 로고
    • 1.5V high speed low power CMOS current sense amplifier
    • November
    • Y. K. Seng and S. S. Rofail, "1.5V High Speed Low Power CMOS current Sense Amplifier", Electronics Letters, Vol. 31, No. 23, pp. 1991-1993, November, 1995.
    • (1995) Electronics Letters , vol.31 , Issue.23 , pp. 1991-1993
    • Seng, Y.K.1    Rofail, S.S.2
  • 4
    • 0026142035 scopus 로고
    • A high-speed clamped bit-line current-mode sense amplifier
    • April
    • T. N. Blalock and R. C. Jaeger, "A High-Speed Clamped Bit-Line Current-Mode Sense Amplifier", IEEE, J. Solid-State Circuits, Vol. 26, No. 4, pp. 542-548, April, 1991.
    • (1991) IEEE, J. Solid-State Circuits , vol.26 , Issue.4 , pp. 542-548
    • Blalock, T.N.1    Jaeger, R.C.2
  • 5
    • 0026853678 scopus 로고
    • A high-speed sensing scheme for IT dynamic RAM's utilizing the clamped bit-line sense amplifier
    • April
    • T. N. Blalock and R. C. Jaeger, "A High-Speed Sensing Scheme for IT Dynamic RAM's Utilizing the Clamped Bit-Line Sense Amplifier", IEEE, J. Solid-State Circuits, Vol. 27, No. 4, pp. 618-624, April, 1992.
    • (1992) IEEE, J. Solid-State Circuits , vol.27 , Issue.4 , pp. 618-624
    • Blalock, T.N.1    Jaeger, R.C.2
  • 7
    • 0027576335 scopus 로고
    • A current-controlled latch sense amplifier and a static power-saving input buffer for low-power architecture
    • April
    • T. Kobayashi, K. Nogami, and T. Shirotori, "A Current-Controlled Latch Sense Amplifier and a Static Power-Saving Input Buffer for Low-Power Architecture", IEEE, J. Solid-State Circuits, Vol. 28, No. 4, pp. 523-526, April, 1993.
    • (1993) IEEE, J. Solid-State Circuits , vol.28 , Issue.4 , pp. 523-526
    • Kobayashi, T.1    Nogami, K.2    Shirotori, T.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.