A 3-V 12-bit second order sigma-delta modulator design in 0.8-μm CMOS

Proceedings - 14th Symposium on Integrated Circuits and Systems Design, SBCCI 2001

Volumn , Issue , 2001, Pages 124-129

  De Mori, C R T ^a   Crepaldi, P C ^a   Pimenta, T C ^a  

^a FEDERAL UNIVERSITY OF ITAJUBÁ   (Brazil)

Author keywords

[No Author keywords available]

Indexed keywords

CASCODE AMPLIFIERS; CMOS INTEGRATED CIRCUITS; DELTA MODULATION; DELTA SIGMA MODULATION; DESIGN; DIFFERENTIAL AMPLIFIERS; INTEGRATED CIRCUIT DESIGN; OPERATIONAL AMPLIFIERS; RECONFIGURABLE HARDWARE; SIGNAL TO NOISE RATIO; SYSTEMS ANALYSIS;

CMOS TECHNOLOGY; DESIGN AND SIMULATION; FULLY DIFFERENTIAL; HIGH PRECISION COMPONENTS; OVER SAMPLING RATIO; SIGMA DELTA MODULATOR; SIMPLE CIRCUITS; SWITCHED CAPACITOR INTEGRATOR;

MODULATORS;

EID: 84966318790     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SBCCI.2001.953014     Document Type: Conference Paper

References (9)

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3. nd Order Sigma-Delta A/D Converter", EE290Y Project, University of California, Berkeley, CA, USA, June 1995.
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8. A. Yukawa "A CMOS 8-Bit High-Speed A/D Converter IC", IEEE Journal of Solid-State Circuits, Vol. SC-20, no 3, June 1985, pp. 775-779.
9. S. R. Norsworthy, R. Schreier, G. C. Temes, "Delta-Sigma Data Converters: Theory, Design and Simulation", IEEE Press, 1997.