Flip chip interfacial behavior under thermal testing

Proceedings of 4th Electronics Packaging Technology Conference, EPTC 2002

Volumn , Issue , 2002, Pages 56-59

  Zhong, Z W ^a   Shi, X Q ^b   Wong, K W ^a   Wang, Z P ^b  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^b SINGAPORE INSTITUTE OF MANUFACTURING TECHNOLOGY   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP SCALE PACKAGES; CRACK PROPAGATION; CRACKS; ELECTRONICS PACKAGING; ENERGY RELEASE RATE; FLIP CHIP DEVICES; INTERFEROMETRY; JOINTS (STRUCTURAL COMPONENTS); MOIRE FRINGES; SHEAR STRAIN; STRAIN ENERGY; STRAIN RATE; STRESS INTENSITY FACTORS;

HIGH SENSITIVITY; HORIZONTAL CRACKS; INTERFACIAL BEHAVIORS; INTERFACIAL CRACKS; MOIRE INTERFEROMETRY; QUALITATIVE STUDY; STRAIN GRADIENTS; STRAIN VARIATION;

CRACK TIPS;

EID: 84964612682     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPTC.2002.1185597     Document Type: Conference Paper

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