Design and implementation of a novel architecture for symmetric FIR filters with boundary handling on Xilinx Virtex FPGAs

Proceedings - 2002 IEEE International Conference on FieId-Programmable Technology, FPT 2002

Volumn , Issue , 2002, Pages 356-359

  Benkrid, A ^a   Benkrid, K ^a   Crookes, D ^a  

^a QUEEN'S UNIVERSITY BELFAST   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

BANDPASS FILTERS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); IMAGE PROCESSING; INTEGRATED CIRCUIT DESIGN; RECONFIGURABLE HARDWARE; SIGNAL PROCESSING;

DESIGN AND IMPLEMENTATIONS; FINITE LENGTH SIGNALS; FULLY SCALABLE; LINEAR PHASIS; NOVEL ARCHITECTURE; PROCESSING SIGNAL; PROCESSING SPEED; REAL TIME PERFORMANCE;

FIR FILTERS;

EID: 84962910802     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPT.2002.1188710     Document Type: Conference Paper

References (10)

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5. Chakrabarti C, 'A DWT based encoder architecture for symmetrically extended images', Proceedings of the International Symposium on Circuits and Systems, 1999.
6. Xilinx Virtex data sheets. http://www.xilinx.com/partinfo/ds022.pdf
7. Benkrid A, Crookes D, Benkrid K, 'A Novel Architecture for FIR filters with Boundary Handling on Xilinx VIRTEX FPGAs', Journal paper to be submitted to IEE Proceedings on Computers and Digital Techniques.
8. Keshab K. Parhi, 'VLSI Digital Signal Processing Systems: Design and Implementation', John Wiley & Sons, 1999
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10. Benkrid A, Crookes D, Benkrid K, Design and Implementation of a Generic 2-D Biorthogonal Wavelet transform on FPGA', IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM'2001, April 2001, Preliminary Proceedings.