Alternatives in FPGA-based SAD implementations

Proceedings - 2002 IEEE International Conference on FieId-Programmable Technology, FPT 2002

Volumn , Issue , 2002, Pages 449-452

  Wong, S ^a   Stougie, B ^a   Cotofana, S ^a  

^a DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

field programmable gate array; hardware synthesis; sum of absolute difference

Indexed keywords

EMBEDDED SYSTEMS; HARDWARE; IMAGE CODING; INTEGRATED CIRCUIT DESIGN; LOGIC SYNTHESIS; MOTION ESTIMATION; MOTION PICTURE EXPERTS GROUP STANDARDS; RECONFIGURABLE HARDWARE; SOFTWARE PACKAGES;

ADDER TREE; AREA REQUIREMENT; FULL SEARCH; HARDWARE IMPLEMENTATIONS; HARDWARE SYNTHESIS; MULTIMEDIA PROCESSING; PROGRAMMABLE PROCESSORS; SUM OF ABSOLUTE DIFFERENCES;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 84962877282     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPT.2002.1188733     Document Type: Conference Paper

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