Engineering ultra-shallow junctions using fRTP™

10th IEEE International Conference on Advanced Thermal Processing of Semiconductors, RTP 2002

Volumn , Issue , 2002, Pages 5-10

  Camm, D M ^a   Gelpey, J C ^a   Thrum, T ^a   Stuart, G C ^a   Elliott, J K ^a  

^a Vortek Industries Ltd   (Canada)

Author keywords

flash assist; rapid thermal anneal; ultra shallow junction

Indexed keywords

HEAT TREATMENT; LASER HEATING; RAPID THERMAL ANNEALING;

ANNEALING TECHNIQUES; FLASH-ASSIST; HEAT SOURCES; JUNCTION DEPTH; LASER THERMAL PROCESSING; TECHNICAL INNOVATION; THERMAL RESPONSE; ULTRA SHALLOW JUNCTION;

SEMICONDUCTOR JUNCTIONS;

EID: 84962449506     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RTP.2002.1184454     Document Type: Conference Paper

References (15)

1. International Technology Roadmap for Semiconductors 1999, 2000 update
2. International Technology Roadmap for Semiconductors 2001
3. S.Shishiguchi, A.Mineji, T.Y.Matsuda, H.Kitajima, Electrochem. Soc. Proc. 99-10 (1999) 105.
4. B.Murto, Proceedings of the Third National Implant Users Meeting, Oct. 1999.
5. th International Conference on Advanced Thermal Processing of Semiconductors-RTP 2001 (2001) 87.
6. W. Lerch, B. Bayha, D.F. Downey, E.A. Arevalo, "State of the Art Techniques for Ultra-Shallow Junction Formation", Electrochem. Soc. Proc. 2001-9 (2001) 321
7. B.Ramachandran, R.Boas, S.Ramamurthy, "Solutions for Ultra-Shallow Junctions-Improvements in Spike Anneal", this symposium.
8. S.Gannavaram, N.Pesovic, M.C.Ozturk, "Low Temperature (≤800°C) Recessed Junction Selective Silicon-Germanium Source/Drain Technology for sub-70 nm CMOS", Proceedings of International Electron Devices Meeting 2000
9. S.B. Felch, S. Talwar, C. Gelatos, Y. Wang, D.F. Downey, E.A. Arevalo, Ion Implant Technology 2000, IEEE (2000)
10. S.Yang, M.O.Thompson, Si Front-End Processing-Physics and Technology of Dopant-Defect Interaction, Mater. Res. Soc. Symp. Proc. 669 (2001) J7.4
11. M. Lefrancois, D. M. Camm, S. McCoy, K. Elliott, "Source/Drain Extension Formed by Impulse Anneal", Electrochem. Soc.Proc. 2001-9 (2001) 297
12. G.C. Stuart, et al, "Temperature Diagnostics for a Dual-Arc fRTP Tool" 10th International Conference on Advanced Thermal Processing of Semiconductors - RTP 2002 (in press)
13. T. Ito, et al, "Flashlamp Anneal Technology for Electrically Activating Ion Implanted Silicon", SSDM 2001
14. T. Gebel, M. Voelskow, W. Skorupa, G. Mannino, V. Privitera, F. Priolo, E. Napolitani, A. Camera, "Millisecond Pulse Annealing of Ultra-Shallow Boron Profiles in Silicon by Flash Lamp Irradiation", MRS Spring 2002 Symposium C, to be published.
15. J. Gelpey, K. Elliott, D. Camm, S. McCoy, J. Ross, D. Downey, E. Arevalo, "Advanced Annealing for Sub-130nm Junction Formation", Spring 2002 ECS Symposium Q1, Philadelphia, March 2002, to be published.