Design and evaluation of a processing-in-memory architecture for the smart memory cube

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 9637, Issue , 2016, Pages 19-31

  Azarkhish, Erfan ^a   Rossi, Davide ^a   Loi, Igor ^a   Benini, Luca ^a,b  

^a UNIVERSITY OF BOLOGNA   (Italy)

^b ETH ZURICH   (Switzerland)

Author keywords

Device driver; Full system analysis; Hybrid memory cube; Processor in memory; Software stack

Indexed keywords

BENCHMARKING; COMPUTATION THEORY; COMPUTER ARCHITECTURE; COMPUTER CIRCUITS; COMPUTER SOFTWARE; FIRMWARE; GEOMETRY; INTEGRATED CIRCUIT DESIGN; MEMORY ARCHITECTURE; PROGRAMMABLE LOGIC CONTROLLERS; RECONFIGURABLE HARDWARE; SYSTEM-ON-CHIP; SYSTEMS ANALYSIS; THREE DIMENSIONAL INTEGRATED CIRCUITS;

DESIGN AND EVALUATIONS; DEVICE DRIVER; HYBRID MEMORY; PROCESSING IN MEMORY; PROCESSOR-IN-MEMORY; PROCESSOR-IN-MEMORY ARCHITECTURES; SIMULATION ENVIRONMENT; SOFTWARE STACKS;

CACHE MEMORY;

EID: 84962343907     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-319-30695-7_2     Document Type: Conference Paper

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