VLSI architecture for a flexible motion estimation with parameters

Proceedings - 7th Asia and South Pacific Design Automation Conference, 15th International Conference on VLSI Design, ASP-DAC/VLSI Design 2002

Volumn , Issue , 2002, Pages 452-457

  Choi, J ^a   Togawa, N ^b   Yanagisawa, M ^a   Ohtsuki, T ^a  

^a WASEDA UNIVERSITY   (Japan)

^b UNIVERSITY OF KITAKYUSHU   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER AIDED DESIGN; COMPUTER HARDWARE; COMPUTER HARDWARE DESCRIPTION LANGUAGES; DESIGN; HARDWARE; IMAGE MATCHING; MOTION ESTIMATION; RECONFIGURABLE ARCHITECTURES; RECONFIGURABLE HARDWARE;

ADDRESS GENERATORS; BLOCK MATCHING ALGORITHMS; MOTION ESTIMATION ALGORITHM; OPTIMIZED SYSTEM; REAL-TIME APPLICATION; RECONFIGURABLE; SYNTHESIS DESIGN; VLSI ARCHITECTURES;

PARAMETER ESTIMATION;

EID: 84962310650     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2002.994962     Document Type: Conference Paper

References (11)

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