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Volumn , Issue , 2002, Pages 65-70

Dynamic noise analysis with capacitive and inductive coupling [high-speed circuits]

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; CROSSTALK; DESIGN; ELECTROMAGNETIC COUPLING; INTEGRATED CIRCUIT INTERCONNECTS; LOW PASS FILTERS; RECONFIGURABLE HARDWARE; SPICE; VLSI CIRCUITS;

EID: 84962239602     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2002.994887     Document Type: Conference Paper
Times cited : (29)

References (10)
  • 3
    • 84893765568 scopus 로고    scopus 로고
    • Interconnect Tuning Strategies for High Performance ICs
    • A. B. Kahng et.al., "Interconnect Tuning Strategies for High Performance ICs," in Design, Automation and Test in Europe, 1998.
    • (1998) Design, Automation and Test in Europe
    • Kahng, A.B.1
  • 5
    • 0031619509 scopus 로고    scopus 로고
    • Design Methodologies for Noise in Digital Integrated Circuits
    • K. L. Shepard, "Design Methodologies for Noise in Digital Integrated Circuits," in Proceedings 35th Design Automation Conference, pp. 94-99, 1998.
    • (1998) Proceedings 35th Design Automation Conference , pp. 94-99
    • Shepard, K.L.1
  • 6
    • 0033714216 scopus 로고    scopus 로고
    • Dynamic Noise Analysis in Precharge-Evaluate Circuits
    • June
    • D. Somasekhar et.al., "Dynamic Noise Analysis in Precharge-Evaluate Circuits," in Design Automation Conference, pp. 243-246, June 2000.
    • (2000) Design Automation Conference , pp. 243-246
    • Somasekhar, D.1
  • 8
    • 0001185510 scopus 로고    scopus 로고
    • A Coordinate-transformed Arnoldi Algorithm for Generating Guaranteed Stable Reduced-Order Models of RLC Circuits
    • L. M. Silveira et.al., "A Coordinate-transformed Arnoldi Algorithm for Generating Guaranteed Stable Reduced-Order Models of RLC Circuits," in Intl. Conf. on Computer Aided Design, 1996.
    • (1996) Intl. Conf. on Computer Aided Design
    • Silveira, L.M.1
  • 10
    • 84893773793 scopus 로고    scopus 로고
    • Skewed CMOS: Noise-immune High Performance Low-Power Static Circuit Family
    • A. Solomatnikov et.al., "Skewed CMOS: Noise-immune High Performance Low-Power Static Circuit Family," in European Solid State Circuits Conference, 2000.
    • (2000) European Solid State Circuits Conference
    • Solomatnikov, A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.