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Volumn , Issue , 2001, Pages 172-179

An empirical study of the scalability aspects of instruction distribution algorithms for clustered processors

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; HARDWARE; PARAMETER ESTIMATION; RECONFIGURABLE HARDWARE; SCALABILITY;

EID: 84962184017     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPASS.2001.990696     Document Type: Conference Paper
Times cited : (24)

References (13)
  • 1
    • 0033717865 scopus 로고    scopus 로고
    • Clock Rate versus IPC: The End of the Road for Conventional Microarchitectures
    • V. Agarwal, et. al., "Clock Rate versus IPC: the End of the Road for Conventional Microarchitectures," Proc. 27th Int'l Symp. on Computer Architecture, 2000.
    • (2000) Proc. 27th Int'l Symp. on Computer Architecture
    • Agarwal, V.1
  • 2
    • 0034462014 scopus 로고    scopus 로고
    • Instruction Distribution Heuristics for Quad-Cluster, Dynamically-Scheduled, Superscalar Processors
    • A. Baniasadi and A. Moshovos, "Instruction Distribution Heuristics for Quad-Cluster, Dynamically-Scheduled, Superscalar Processors," Proc. Int'l Symp. on Microarchitecture (MICRO-33), 2000.
    • (2000) Proc. Int'l Symp. on Microarchitecture (MICRO-33)
    • Baniasadi, A.1    Moshovos, A.2
  • 3
    • 0002640853 scopus 로고    scopus 로고
    • Guest Editors Introduction: Billion-Transistor Architectures
    • September
    • D. Burger and J. R. Goodman, "Guest Editors Introduction: Billion-Transistor Architectures," COMPUTER, Vol. 30, No. 9, pp. 46-49, September 1997.
    • (1997) Computer , vol.30 , Issue.9 , pp. 46-49
    • Burger, D.1    Goodman, J.R.2
  • 6
    • 0030685021 scopus 로고    scopus 로고
    • The Alpha 21264: A 500 MHz Out-of-Order Execution Microprocessor
    • D. Leibholz and R. Razdan, "The Alpha 21264: A 500 MHz Out-of-Order Execution Microprocessor," Proc. Compcon, pp. 28-36, 1997.
    • (1997) Proc. Compcon , pp. 28-36
    • Leibholz, D.1    Razdan, R.2
  • 8
    • 0031605773 scopus 로고    scopus 로고
    • An Empirical Study of Decentralized ILP Execution Models
    • N. Rangananathan and M. Franklin, "An Empirical Study of Decentralized ILP Execution Models," Proc. ASPLOS-VIII, 1998.
    • (1998) Proc. ASPLOS-VIII
    • Rangananathan, N.1    Franklin, M.2
  • 12
    • 0030129806 scopus 로고    scopus 로고
    • The MIPS R10000 Superscalar Microprocessor
    • April
    • K. C. Yeager, "The MIPS R10000 Superscalar Microprocessor," IEEE Micro, pp. 28-40, April 1996.
    • (1996) IEEE Micro , pp. 28-40
    • Yeager, K.C.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.