An empirical and analytical comparison of delay elements and a new delay element design

Proceedings - IEEE Computer Society Workshop on VLSI 2000: System Design for a System-on-Chip Era, IWV 2000

Volumn , Issue , 2000, Pages 81-86

  Mahapatra, N R ^a   Garimella, S V ^b   Tareen, A ^c  

^a UNIVERSITY AT BUFFALO   (United States)

^b SEAGATE TECHNOLOGY   (United States)

^c the State University of New York   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; BUSBARS; ELECTRIC POWER UTILIZATION; INTEGRATED CIRCUIT DESIGN; RECONFIGURABLE HARDWARE;

CASCADED INVERTERS; DELAY ELEMENTS; DELAY VALUES; SCHMITT TRIGGER; SIGNAL INTEGRITY; TRANSMISSION GATE; VLSI DESIGN; VOLTAGE-CONTROLLED DELAY ELEMENT;

DESIGN;

EID: 84961932823     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IWV.2000.844534     Document Type: Conference Paper

References (9)

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