Voiding in ultra porous low-k materials proposed mechanism, detection and possible solutions

Proceedings of the IEEE 2002 International Interconnect Technology Conference, IITC 2002

Volumn , Issue , 2002, Pages 236-238

  Jacobs, T ^a,b   Brennan, K ^a,c   Carpio, R ^a   Mosig, K ^a,d   Lin, Jing Cheng ^a,e   Cox, H ^a,b   Mlynko, W ^f   Fourcher, J ^a   Bennett, J ^a   Wolf, J ^a,g   Augur, R ^a,b   Gillespie, P ^a,c  

^a SEMATECH   (United States)

^b NXP SEMICONDUCTORS   (Netherlands)

^c TEXAS INSTRUMENTS   (United States)

^d INFINEON TECHNOLOGIES AG   (Germany)

^e TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

^f IBM   (United States)

^g INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DIELECTRIC MATERIALS; SEMICONDUCTOR DEVICE MANUFACTURE;

CLEAN PROCESS; INTEGRATION ISSUES; INTERCONNECT DIELECTRICS; INTERNATIONAL SEMATECH; INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS; LOW-K MATERIALS; POROUS LOW-K MATERIAL; PROCESS CHEMICALS;

LOW-K DIELECTRIC;

EID: 84961726909     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IITC.2002.1014944     Document Type: Conference Paper

References (3)

1. International Technology Roadmap for Semiconductors, Semiconductor Industry Association, San Jose, CA 2001
2. Jing-Cheng Lin, unpublished results
3. Simon Lin, et al., Proceedings of IITC 2001, p. 146