RSA acceleration with field programmable gate arrays

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1587, Issue , 1999, Pages 164-176

  Tiountchik, Alexander ^a   Trichina, Elena ^b  

^a INSTITUTE OF MATHEMATICS   (Belarus)

^b UNIVERSITY OF SOUTH AUSTRALIA   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT DESIGN; LOGIC GATES; SECURITY OF DATA; SIGNAL RECEIVERS; SYSTOLIC ARRAYS;

BIT LEVEL; BUILDING BLOCKES; CRYPTOGRAPHIC SCHEMES; EFFICIENT IMPLEMENTATION; INTERMEDIATE RESULTS; MODULAR EXPONENTIATION;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 84961327178     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-48970-3_14     Document Type: Conference Paper

References (17)

1. A. Bosselaers, R. Govaerts, and J. Vandewalle, Comparison of three modular reduction functions. pp 175-186
2. D. A. Buell, J. M. Arnold, and W. J. Kleinfelder (Eds.), Splash 2: FPGAs in a custom computing machine. IEEE Computer Society Press, 1996.
3. S. R. Dusse and B. S. Kaliski, A Cryptographic Library for the Motorola DSP56000, in Advances in Cryptology - EUROCRYPT’90, Spinger-Verlag, LNCS, vol. 473 (1990) 230-244.
4. S. E. Eldridge, A faster modular multiplication algorithm. Intern. J. Computer Math., 1993 (40) 63-68.
5. S. E. Eldridge and C. D. Walter, Hardware implementation of Montgomery’s modular multiplication algorithm. IEEE Trans. on Comput., 1993 (42) 693-699.
6. T. ElGamal, A public-key cryptosystem and a signature scheme based on discrete logarithms. IEEE Trans. Inform. Theory, 1985 (31) 469-472.
7. S. Even, Systolic modular multiplication, in Advances in Cryptology - Crypto’90, Springer-Verlag, LNCS, vol. 537 (1990) 619-624.
8. A. Fiat and A. Shamir, How to prove yourself, in Advances in Cryptology - Crypto’86, Springer-Verlag, LNCS, vol. 263 (1986) 186-194.
9. K. Iwamura, T. Matsumoto and H. Imai, Modular Exponentiation Using Montgomery Method and the Systolic Array, IEICE Technical Report, vol. 92, no. 134, ISEC92-7, 1992, pp.49-54.
10. P. L. Montgomery, Modular multiplication without trial division. Mathematics of Computations, 1985 (44) 519-521.
11. C. K. Koc, RSA Hardware Implementation, TR 801, RSA Laboratories, 30 pages, April 1996. http://www.ece.orst.edu/koc/vita/v22ab.html
12. H. Orup, E. Svendsen, E. And, VICTOR an efficient RSA hardware implementation. In: Eurocrypt 90, LNCS, vol. 473 (1991) 245-252
13. R. Rivest, A. Shamir and L. Adleman, A method of obtaining digital signatures and public key cryptosystems. J. +em Commun. of ACM, 1978 (21) 120-126.
14. J. Sauerbrey, A Modular Exponentiation Unit Based on Systolic Arrays, in Advances in Cryptology - A USCRYPT’93, Springer-Verlag, LNCS, vol. 718 (1993) 505-516.
15. M. Shand, J. Vuillemin, Fast Implementation of of RSA Cryptography. In Proc. of the 11th IEEE Symposium on Computer Arithmetics, 1993. pp.252-259.
16. A. A. Tiountchik, Systolic modular exponentiation via Montgomery algorithm. J. Electronics Letters, 1998 (34).
17. C. D. Walter, Systolic Modular Multiplication. IEEE Trans, on Comput., 1993 (42) 376-378.