Locality-centric thread scheduling for bulk-synchronous programming models on CPU architectures

Proceedings of the 2015 IEEE/ACM International Symposium on Code Generation and Optimization, CGO 2015

Volumn , Issue , 2015, Pages 257-268

  Kim, Hee Seok ^a   Hajj, Izzat El ^a   Stratton, John ^b   Lumetta, Steven ^a   Hwu, Wen Mei ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

^b Center for Language and Brain   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

PROGRAM COMPILERS; SCHEDULING;

BARRIER SYNCHRONIZATION; HETEROGENEOUS COMPUTING; IMPROVING PERFORMANCE; MEMORY ACCESS PATTERNS; MULTI-CORE CPU ARCHITECTURES; SYNCHRONIZATION POINTS; SYNCHRONOUS PROGRAMMING; THREAD SCHEDULING;

MEMORY ARCHITECTURE;

EID: 84961314978     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CGO.2015.7054205     Document Type: Conference Paper

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