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Volumn 1, Issue , 2000, Pages 337-342

Quantitative evaluation of three reconfiguration strategies on FPGAs: A case study

Author keywords

[No Author keywords available]

Indexed keywords

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); RECONFIGURABLE ARCHITECTURES;

EID: 84960400392     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPC.2000.846574     Document Type: Conference Paper
Times cited : (4)

References (13)
  • 2
    • 84947439246 scopus 로고    scopus 로고
    • Dynamic reconfiguration of a pmmla for high-throughput applications
    • Mar
    • G. Ghare and S. Lee. Dynamic reconfiguration of a pmmla for high-throughput applications. In Proc. IEEE Reconfigurable Architectures Workshop, pages 1-6, Mar. 1998.
    • (1998) Proc. IEEE Reconfigurable Architectures Workshop , pp. 1-6
    • Ghare, G.1    Lee, S.2
  • 4
  • 5
  • 6
    • 0031200679 scopus 로고    scopus 로고
    • Scalar quantisation using a fast systolic array
    • G. M. Megson and E. Diemoz. Scalar quantisation using a fast systolic array. Electron. Lett., 33(17):1435-1437, 1997.
    • (1997) Electron. Lett. , vol.33 , Issue.17 , pp. 1435-1437
    • Megson, G.M.1    Diemoz, E.2
  • 12
    • 0032097108 scopus 로고    scopus 로고
    • Improving functional density using run-time circuit reconfiguration
    • June
    • M. J. Wirthlin and B. L. Hutchings. Improving functional density using run-time circuit reconfiguration. IEEE Trans. on VLSI Systems, 6(2):247-256, June 1998.
    • (1998) IEEE Trans. on VLSI Systems , vol.6 , Issue.2 , pp. 247-256
    • Wirthlin, M.J.1    Hutchings, B.L.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.