Interconnect-Memory challenges for multi-chip, silicon interposer systems

ACM International Conference Proceeding Series

Volumn 05-08-October-2015, Issue , 2015, Pages 3-10

  Loh, Gabriel H ^a   Jerger, Natalie Enright ^a,b   Kannan, Ajaykumar ^b   Eckert, Yasuko ^a  

^a ADVANCED MICRO DEVICES   (United States)

^b UNIVERSITY OF TORONTO   (Canada)

Author keywords

Die stacking; Interconnect; Memory; Silicon interposer

Indexed keywords

DATA STORAGE EQUIPMENT; INTEGRATED CIRCUIT INTERCONNECTS; MICROPROCESSOR CHIPS; SILICON;

3D-STACKED MEMORY; DIE STACKING; INTERCONNECT; INTERCONNECT ARCHITECTURES; MEMORY STACK; POSITION PAPERS; RESEARCH EFFORTS; SILICON INTERPOSERS;

THREE DIMENSIONAL INTEGRATED CIRCUITS;

EID: 84959358176     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2818950.2818951     Document Type: Conference Paper

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