Precise exception semantics in dynamic compilation

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2304, Issue , 2002, Pages 95-110

  Gschwind, Michael ^a   Altman, Erik ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

HARDWARE; LINEAR TRANSFORMATIONS; MATHEMATICAL TRANSFORMATIONS; RECONFIGURABLE HARDWARE; SEMANTICS; UNCERTAINTY ANALYSIS;

DYNAMIC COMPILATION; EXCEPTION HANDLERS; HARDWARE SUPPORTS; LINEAR TIME; LIVENESS; SPECIALIZED HARDWARE;

PROGRAM COMPILERS;

EID: 84959055542     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-45937-5_9     Document Type: Conference Paper

References (16)

1. E. Altman and K. Ebcioğlu. Simulation and debugging of full system binary translation. In Proc. of the 13th International Conference on Parallel and Distributed Computing Systems, pages 446-453, Las Vegas, NV, August 2000.
2. E. Altman, K. Ebcioğlu, M. Gschwind, and S. Sathaye. Efficient instruction scheduling with precise exceptions. In preparation.
3. V. Bala, E. Duesterwald, and S. Banerjia. Dynamo: A transparent Dynamic Optimization System. SIGPLAN PLDI, pages 1-12, June 18-21, 2000, Vancouver, BC, June 2000.
4. V. Bala, E. Duesterwald, and S. Banerjia. Transparent dynamic optimization: The design and implementation of Dynamo. Technical Report 99-78, HP Laboratories, Cambridge, MA, June 1999.
5. H. Chung, S.-M. Moon, and K. Ebcioğlu. Using value locality on VLIW machines through dynamic compilation. In Proc. of the 1999 Workshop on Binary Translation, IEEE Computer Society Technical Committee on Computer Architecture Newsletter, pages 69-76, December 1999.
6. K. Ebcioğlu and E. Altman. DAISY: dynamic compilation for 100% architectural compatibility. In Proc. of the 24th Annual International Symposium on Computer Architecture, pages 26-37, Denver, CO, June 1997. ACM.
7. K. Ebcioğlu and E. Altman. DAISY: dynamic compilation for 100% architectural compatibility. Research Report RC20538, IBM T. J. Watson Research Center, Yorktown Heights, NY, 1996.
8. K. Ebcioğlu, E. Altman, S. Sathaye, and M. Gschwind. Execution-based scheduling for VLIW architectures. In Euro-Par '99 Parallel Processing - 5th International Euro-Par Conference, number 1685 in Lecture Notes in Computer Science, pages 1269-1280. Springer Verlag, Berlin, Germany, August 1999.
9. K. Ebcioğlu, R. Groves, K. Kim, and G. Silberman. VLIW compilation techniques in a superscalar environment. In Proc. of the ACM SIGPLAN 1994 Conference on Programming Language Design and Implementation, volume 29 of SIGPLAN Notices, pages 36-48, Orlando, FL, June 1994. ACM.
10. M. Gschwind, E. Altman, S. Sathaye, P. Ledak, and D. Appenzeller. Dynamic and transparent binary translation. IEEE Computer, 33(3):54-59, March 2000.
11. M. Gschwind, K. Ebcioğlu, E. Altman, and S. Sathaye. Binary translation and architecture convergence issues for IBM System/390. In Proc. of the International Conference on Supercomputing 2000, Santa Fe, NM, May 2000. ACM.
12. J. Hennessey. Symbolic Debugging of Optimized Code. ACM Transactions on Programming Languages and Systems, July 1982, Volume 4, Issue 3, pages 323-344, ACM Press.
13. P. Hohensee, M. Myszewski, and D. Reese. WABI CPU emulation. In Hot Chips VIII, Palo Alto, CA, 1996.
14. E. Kelly, R. Cmelik, and M. Wing. Memory controller for a microprocessor for detecting a failure of speculation on the physical nature of a component being addressed. US Patent 5832205, November 1998.
15. B. Le. An out of order execution technique for runtime binary translators. In Proc. of the Eighth International Conference on Architectural Support for Programming Languages and Operating Systems, volume 33 of SIGPLAN Notices, pages 151-158, San Jose, CA, 1998. ACM.
16. S. Sathaye, P. Ledak, J. LeBlanc, S. Kosonocky, M. Gschwind, J. Fritts, Z. Filan, A. Bright, D. Appenzeller, E. Altman, and C. Agricola. BOA: Targeting multi-gigahertz with binary translation. In Proc. of the 1999 Workshop on Binary Translation, IEEE Computer Society Technical Committee on Computer Architecture Newsletter, pages 2-11, December 1999.