A synergy between model-checking and type inference for the verification of value-passing higher-order processes

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1548, Issue , 1998, Pages 214-230

  Debbabi, Mourad ^a   Benzakour, Abdelkader ^a   Ktari, Béchir ^a  

^a UNIVERSITÉ LAVAL   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ALGEBRA; CALCULATIONS; COMPUTER CIRCUITS; DIFFERENTIATION (CALCULUS); FORMAL VERIFICATION; RECONFIGURABLE HARDWARE; SEMANTICS; SOFTWARE ENGINEERING; SYNTACTICS;

HIGHER-ORDER PROCESS; LABELED TRANSITION SYSTEMS; SEMANTIC THEORIES; STATIC SEMANTICS; TYPED LAMBDA CALCULUS; VALUE PASSING PROCESS; VERIFICATION FRAMEWORK; VERIFICATION LOGIC;

MODEL CHECKING;

EID: 84958975913     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-49253-4_17     Document Type: Conference Paper

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