Pseudorandom testing of microprocessors at instruction/data flow level

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1150, Issue , 1996, Pages 246-263

  Sosnowski, Janusz ^a   Kusmierczyk A ^a  

^a WARSAW UNIVERSITY OF TECHNOLOGY   (Poland)

Author keywords

[No Author keywords available]

Indexed keywords

ARTIFICIAL INTELLIGENCE; COMPUTER SCIENCE; COMPUTERS;

CIRCUIT LEVELS; FAULT MODEL; PSEUDO RANDOM; PSEUDORANDOM TESTING; SOFTWARE GENERATORS; TEST PROGRAM; THEORETICAL STUDY; UNIVERSAL APPROACH;

SOFTWARE TESTING;

EID: 84958956589     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-61772-8_42     Document Type: Conference Paper

References (25)

1. D. Brahme, J.A. Abraham, Functional testing of microprocessors, IEEE Transactions on Computers, C-33, No.6, June 1984, pp.475-485.
2. C.K. Chin, E.J. McCluskey, Test length for pseudorandom testing, IEEE Transactions on Computers, vol.C-36, No.2, February, 1987, pp.252-256.
3. R. David, J Brzozowski, Random test length for bounded faults in RAMs, Proc. European Test Conf. 1993,149-158.
4. R. David, A. Fuentes, B. Courtois, Random pattern testing versus deterministic testing of RAMs, IEEE Transactions on Computers, C-38, May 1989, pp.637-650.
5. X. Fedi, R. David, Experimental results from random testing of microprocessor,IEEE Int. Symp. FTCS-14, 1984, pp.225-230.
6. A.J. van de Goor, Testing semiconductor memories, John Wiley & Sons, 1991.
7. AJ.van de Goor, ThJ.W. Verhallen, Functional testing of current microprocessors, Proc. IEEE Int. Test Conf., 1992, pp.684-695.
8. Ch.L. Hudson, G.D Paterson, Parallel self-test with pseudorandom test patterns, Proc. IEEE Int. Test Conf., 1987, pp.954-963.
9. M. Jacomino, R. David, A new approach of test confidence estimation, Proc.IEEE FTCS-19, 1989, pp.307-314.
10. K. Kim, S. H. Dong, J. G. Tront, On using signature registers and pseudorandom pattern generator in built-in-self-test, IEEE Transactions of Computer Aided Design, No.8, August 1988, pp.919-928
11. H P Kluge, Microprocessor testing by Instruction Sequences derived from random patterns, Proc. IEEE Int. Test Conf., 1988, pp.73-80.
12. A. Krasniewski, S. Pilarski, Circular self-test-path: a low cost BIST technique for VLSI circuits, IEEE Transactions on Computer Aided Design, vol.8, No.4, 1989,pp.46-55.
13. Y.K Malaiya, S Yang, The coverage problem for random testing. Proc. of IEEEInt. Test Conf., 1984, pp.237-245.
14. E.J. McCluskey, Probability models for pseudorandom test sequences, IEEE Transactions on Computer Aided Design, vol.7, No.l, January, 1988, pp.68-74.
15. S. Pilarski, A. Pierzynska, BIST and delay fault detection, Pro. of IEEE Int. Test Conf., 1993, pp.236-242.
16. I.M. Ratiu, H.B. Bakoglu, Pseudorandom built-in self-test methodology and implementation for IBM RISC system/6000 processor, IBM J. Res. Develop.vol.34, No.l January 1990, pp.78-84.
17. J. Salinas, F. Lombardi, A data path approach for testing microprocessors with a fault bound, Microprocessors and Microsystems, vol.16, No.10,1992, pp.529-539
18. S. Sastry. A. Majumder, Test efficiency of random self-test of sequential circuits, IEEE Transactions on Computer Aided Design, vol.10, No.3, March 1991, pp.390-398.
19. J. Savir, P.H. Bardel, On random pattern test length, IEEE Transactions on Computers, vol. C-36, No.3, March 1987, pp.332-343.
20. H. D. Schnurmann, E. Lindbloom, R. Carpenter, The weighed random test pattern generator, IEEE Transactions on Computers, vol. c-24, No.7,July, 1975,pp.695-700.
21. J. Sosnowski, In system testing of cache memories, Proceedings of IEEE Int.Test Conf., 1995, pp.384-393
22. P. Thevenod Fosse, R. David, Random testing of the data processing section ofa microprocessor, Proc. IEEE FTCS-11, 1981
23. P. Thevenod Fosse, R. David, Random testing of the control section of a microprocessor, Proc. IEEE FTCS-13, 1983, pp.366-373.
24. K. D. Wagner, C. K. Chin, E. J. McCluskey, Pseudorandom testing, IEEE Transactions on Computers, vol. C-36, No.3, March 1987, pp.332-343.
25. J. Sosnowski, A. Kusmierczyk, Pseudorandom vs deterministic testing of Intel 80x86 processors, Proceedings of 22nd EUROMICRO conference, IEEE Computer Society, 1996 (to appear)