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Volumn 2, Issue 1, 2001, Pages 93-134

Processor Verification Using Efficient Reductions of the Logic of Uninterpreted Functions to Propositional Logic

Author keywords

Algorithms; Decision procedures; Processor verification; Uninterpreted functions; Verification

Indexed keywords


EID: 84958791713     PISSN: 15293785     EISSN: 1557945X     Source Type: Journal    
DOI: 10.1145/371282.371364     Document Type: Article
Times cited : (92)

References (23)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.