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Volumn 2102, Issue , 2001, Pages 144-154

Finite instantiations in equivalence logic with uninterpreted functions

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED ANALYSIS; FUNCTIONS; RECONFIGURABLE HARDWARE;

EID: 84958754487     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-44585-4_13     Document Type: Conference Paper
Times cited : (8)

References (11)
  • 8
    • 84958786206 scopus 로고    scopus 로고
    • Finite Instan-tiations in Equivalence Logic with Uninterpreted Func- tions
    • Weizmann Institute of Science
    • A. Pnueli, Y. Rodeh and O. Shtrichman, "Finite Instan-tiations in Equivalence Logic with Uninterpreted Func- tions", Technical report, Weizmann Institute of Science, 2001. http://www.wisdom.weizmann.ac.il/~verify/publication/2001/yrodehtr2001.ps.gz
    • (2001) Technical Report
    • Pnueli, A.1    Rodeh, Y.2    Shtrichman, O.3
  • 9
    • 84969364377 scopus 로고    scopus 로고
    • Bit-level Abstraction in the Verifcation of Pipelined Microprocessors by Correspondence Checking
    • R.E. Bryant and M. Velev, "Bit-level Abstraction in the Verifcation of Pipelined Microprocessors by Correspondence Checking", In Formal Methods in Computer Aided Design FMCAD '98.
    • Formal Methods in Computer Aided Design FMCAD '98
    • Bryant, R.E.1    Velev, M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.