Adaptive equalization of digital communication channels using evolvable hardware

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1259, Issue , 1997, Pages 379-389

  Murakawa, Masahiro ^a   Yoshizawa, Shuji ^a   Higuchi, Tetsuya ^b  

^a UNIVERSITY OF TOKYO   (Japan)

^b ELECTROTECHNICAL LABORATORY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMMUNICATION CHANNELS (INFORMATION THEORY); EQUALIZERS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HARDWARE; LOGIC DEVICES; RECONFIGURABLE HARDWARE;

ADAPTIVE CAPABILITIES; ADAPTIVE EQUALIZATION; ADAPTIVE EQUALIZER; DIGITAL COMMUNICATION CHANNELS; EVOLVABLE HARDWARE; HIGH-SPEED CHANNELS; ITS ARCHITECTURE; PROGRAMMABLE LOGIC DEVICE;

DIGITAL COMMUNICATION SYSTEMS;

EID: 84958679351     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-63173-9_60     Document Type: Conference Paper

References (6)

1. Proakis J., "Digital Communications," Prentice Hall Inc., 1988.
2. Widrow B., "Adaptive Signal Processing," Prentice Hall Inc., 1985.
3. Murakawa M. et al., "Hardware Evolution at Function Level," Proc. of Parallel Problem Solving from Nature (PPSN'96), 1996.
4. Higuchi T. et al., "Evolvable Hardware with Genetic Learning," Massively Parallel Artificial Intelligence (ed. H. Kitano), MIT Press, 1994.
5. Goldberg D., "Genetic Algorithms in Search, Optimization, and Machine Learning," Addison Wesley, 1989.
6. Kajitani I. et al., "Variable Length Chromosome GA for Evolvable Hardware," Proc. of the 1996 IEEE International Conference on Evolutionary Computation (ICEC'96), pp.443-447, 1996.