-
1
-
-
0028317462
-
Ttp - A time triggered protocol for fault-tolerant real-time systems
-
H. Kopetz and G. Gruensteidl. Ttp - a time triggered protocol for fault-tolerant real-time systems. IEEE Computer, 27(l):14-23, January 1994.
-
(1994)
IEEE Computer
, vol.27
, Issue.1
, pp. 14-23
-
-
Kopetz, H.1
Gruensteidl, G.2
-
2
-
-
0003312601
-
The time-triggered approach to real-time system design
-
B. Randell, J.-C. Laprie, H. Kopetz, and B. Littlewood, editors, Springer
-
Hermann Kopetz. The time-triggered approach to real-time system design. In B. Randell, J.-C. Laprie, H. Kopetz, and B. Littlewood, editors, Predictably Dependable Computing Systems. Springer, 1995.
-
(1995)
Predictably Dependable Computing Systems
-
-
Kopetz, H.1
-
3
-
-
0001837069
-
A new fault-tolerant algorithm for clock synchronization
-
J. Lundelius Welch and N. Lynch. A new fault-tolerant algorithm for clock synchronization. Inf. and Comp., 77(1):l-36, 1988.
-
(1988)
Inf. And Comp
, vol.77
, Issue.1
, pp. 1-36
-
-
Lundelius Welch, J.1
Lynch, N.2
-
5
-
-
84957365826
-
Combining specification, proof checking, and model checking
-
R. Alur and T.A. Hen-zinger, editors, New Brunswick, NJ, July/August, Springer-Verlag
-
S. Owre, S. Rajan, J.M. Rushby, N. Shankar, and M.K. Srivas. PVS: Combining specification, proof checking, and model checking. In R. Alur and T.A. Hen-zinger, editors, Computer-Aided Verification, CAV '96, volume 1102 of Lecture Notes in Computer Science, pages 411-414, New Brunswick, NJ, July/August 1996. Springer-Verlag.
-
(1996)
Computer-Aided Verification, CAV '96, Volume 1102 of Lecture Notes in Computer Science
, pp. 411-414
-
-
Owre, S.1
Rajan, S.2
Rushby, J.M.3
Shankar, N.4
Srivas, M.K.5
-
6
-
-
0029251055
-
Formal Verification for Fault-Tolerant Architectures: Prolegomena to the Design of PVS
-
February
-
S. Owre, J. Rushby, N. Shankar, and F. von Henke. Formal Verification for Fault-Tolerant Architectures: Prolegomena to the Design of PVS. IEEE Trans, on Software Engineering, 21(2):107-125, February 1995.
-
(1995)
IEEE Trans, on Software Engineering
, vol.21
, Issue.2
, pp. 107-125
-
-
Owre, S.1
Rushby, J.2
Shankar, N.3
Von Henke, F.4
-
7
-
-
84944677742
-
PVS: A prototype verification system
-
D. Kapur, editor, of Lecture Notes in Artificial Intelligence, Saratoga, NY, June, Springer-Verlag
-
S. Owre, J. M. Rushby, and N. Shankar. PVS: A prototype verification system. In D. Kapur, editor, 11th International Conference on Automated Deduction (CADE), volume 607 of Lecture Notes in Artificial Intelligence, pages 748-752, Saratoga, NY, June 1992. Springer-Verlag.
-
(1992)
11Th International Conference on Automated Deduction (CADE)
, vol.607
, pp. 748-752
-
-
Owre, S.1
Rushby, J.M.2
Shankar, N.3
-
9
-
-
0345448683
-
Systematic formal verification for fault-tolerant time-triggered algorithms
-
M. Dal Cin, C. Meadows, and W. H. Sanders, editors, IEEE Computer Society, March
-
J. Rushby. Systematic formal verification for fault-tolerant time-triggered algorithms. In M. Dal Cin, C. Meadows, and W. H. Sanders, editors, Dependable Computing for Critical Applications—6, pages 203-222. IEEE Computer Society, March 1997.
-
(1997)
Dependable Computing for Critical Applications—6
, pp. 203-222
-
-
Rushby, J.1
-
10
-
-
0027147270
-
Formal verification of algorithms for critical systems
-
Jan
-
J. M. Rushby and F. von Henke. Formal verification of algorithms for critical systems. IEEE Trans, on Software Engineering, 19(l):13-23, Jan. 1993.
-
(1993)
IEEE Trans, on Software Engineering
, vol.19
, Issue.1
, pp. 13-23
-
-
Rushby, J.M.1
Von Henke, F.2
-
14
-
-
0023384521
-
Optimal clock synchronization
-
July
-
T. K. Srikanth and S. Toueg. Optimal clock synchronization. Journ. of the ACM, 34(3):626-645, July 1987.
-
(1987)
Journ. Of the ACM
, vol.34
, Issue.3
, pp. 626-645
-
-
Srikanth, T.K.1
Toueg, S.2
|