An hardware/software partitioning algorithm for custom computing machines

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1304, Issue , 1997, Pages 274-283

  Chichkov, Anton Velinov ^a   Almeida, Carlos Beltrán ^a  

^a INSTITUTO SUPERIOR TÉCNICO   (Portugal)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 84957885580     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-63465-7_232     Document Type: Conference Paper

References (10)

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3. Peter M. Athanas, “An Adaptive Machine Architecture and Compiler for Dynamic Processor Reconfiguration”, Technical Report LEMS-101, Brown University, Februaiy, 1992.
4. Rolf Ernst Jorg, Henkel Thomas Benner, “Hardware-Software Co-synthesis for Microcontrollers”, IEEE Design & Test of Computers, December 1993, page 64.
5. Rajesh Kumar Gupta, “Co-Synthesis of Hardware and Software for Digital Embedded Systems”, Ph.D. dissertation Stanford University, December 10, 1993.
6. D. D. Gajski, Frank Vahid, Sanjiv Narayan, Jie “Specification and design of embedded systems”, Gong University of California at Irvine. PTR Prentice Hall 1994.
7. Anton Chichkov, C. Beltrán Almeida, “Identification and Optimisation of Parallelism in Hardware/Software Partitioning”, International Workshop on Logic and Architecture Synthesis, Grenoble France, December 1996.
8. F. Kurdahi, Ms. Min Xu, “Area & Timing Estimation Techniques for Lookup Table-Based FPGA with Application to High-Level Synthesis”, International Workshop on Logic and Architecture Synthesis, Grenoble France, December 1996.
9. John L. Hennessy, David A. Patterson, “Computer Architecture a Quantitative Approach”, Morgan Kaufmann Publishers, INC. San Mateo, California.
10. Xilinx, “The Programmable Logic Data Book”, 1993.