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Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1304, Issue , 1997, Pages 225-264

Automatic mapping of algorithms onto multiple FPGA-SRAM modules

(2) Acock, S J B a Dimond, K R a

a NONE

Author keywords

[No Author keywords available]

Indexed keywords

EID: 84957874814 PISSN: 03029743 EISSN: 16113349 Source Type: Book Series
DOI: 10.1007/3-540-63465-7_230 Document Type: Conference Paper

Times cited : (1)

References (10)

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- S J. B. Acock, K. R. Dimond, “Hardware Implementations of Algorithms on Networks of FPGA Processors”, IEE Professional Group C2 Colloquium Digest No. 96/029: “Digital System Design using Synthesis Techniques”, pp.3/1-3/6, Feb. 1996.
- (1996) IEE Professional Group C2 Colloquium , pp. 1-3
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2
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- Anyboard: An FPGA-Based, Reconfigurable System
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- D. E. Van den Bout, J. H. Morris, D. A. Thomae, S. Labrozzi, S. Wingo, D. Hallman, “Anyboard: An FPGA-Based, Reconfigurable System”, IEEE Design and Test of Computers, pp.21-30, Sept. 1992.
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3
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- A Field Programmable Prototyping Board: XC4000 BORG Users Guide”
- Santa Cruz
- P. K. Chan, “A Field Programmable Prototyping Board: XC4000 BORG User’s Guide”, Computer Engineering, University of California, Santa Cruz, 1994.
- (1994) Computer Engineering, University of California
- Chan, P.K.¹

4
- 85046457769
- A Linear Time Heuristic for Improving Network Partitions
- C. M. Fidueci, R. M. Mattheyses, “A Linear Time Heuristic for Improving Network Partitions”, 19th Design Automation Conference Proceedings, pp.175-181, 1982.
- (1982) 19Th Design Automation Conference Proceedings , pp. 175-181
- Fidueci, C.M.¹ Mattheyses, R.M.²

5
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- Generic Reusable Module (GERM)
- Durham, North Carolina, Sept
- J. D. Sterling Babcock, A. Dollas, B. Ward, “Generic Reusable Module (GERM)”, Dept. Electrical Engineering, Duke University, Durham, North Carolina, Sept. 1994.
- (1994) Dept. Electrical Engineering, Duke University
- Sterling Babcock, J.D.¹ Dollas, A.² Ward, B.³

6
- 0021425044
- An Improved Min-Cut Algorithm for Partitioning VLSI Networks
- May
- B. Krishnamurthy, “An Improved Min-Cut Algorithm for Partitioning VLSI Networks”, IEEE Transactions on Computers, Vol. C-33, No. 5, pp.438-446, May 1984.
- (1984) IEEE Transactions on Computers , vol.33 C , Issue.5 , pp. 438-446
- Krishnamurthy, B.¹

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- IEEE Standards Board, The Institute of Electrical and Electronic Engineers Inc
- “IEEE Standard VHDL Language Reference Manual”, IEEE Standards Board, The Institute of Electrical and Electronic Engineers Inc., 1993.
- (1993) IEEE Standard VHDL Language Reference Manual

8
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- Multi-Way Network Partitioning
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- L. A. Sanchis, “Multi-Way Network Partitioning”, IEEE Transactions on Computers, Vol. 38, No. 1, pp.62-81, Jan. 1989.
- (1989) IEEE Transactions on Computers , vol.38 , Issue.1 , pp. 62-81
- Sanchis, L.A.¹

9
- 5244314331
- The Transmogrifier: The University of Toronto Field-Programmable System
- June
- D. Galloway, D. Karchmer, P. Chow, D. Lewis, J. Rose, “The Transmogrifier: The University of Toronto Field-Programmable System”, Technical Report CSRI-306, June 1994.
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- Galloway, D.¹ Karchmer, D.² Chow, P.³ Lewis, D.⁴ Rose, J.⁵

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- (1996) The Programmable Logic Data Book

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