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Volumn 1060, Issue , 1996, Pages 1-16

Pipelining-dovetailing: A transformation to enhance software pipelining for nested loops

Author keywords

Fine grain parallelism; Instruction level parallelism; Loop scheduling; Nested loop; Software pipelining; Superscalar; Very long instruction word(VLIW)

Indexed keywords

EMBEDDED SYSTEMS; PARALLEL PROCESSING SYSTEMS; PROGRAM COMPILERS; SCHEDULING;

EID: 84957637097     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-61053-7_49     Document Type: Conference Paper
Times cited : (8)

References (21)
  • 1
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    • Instruction-level parallel processing: History, overview and perspective
    • January
    • B. R. Rau and J.A. Fisher. Instruction-level parallel processing: History, overview and perspective. The Journal of Supercomputing, 7(1), January 1993
    • (1993) The Journal of Supercomputing , vol.7 , Issue.1
    • Rau, B.R.1    Fisher, J.A.2
  • 3
    • 0002106131 scopus 로고
    • A new compilation technique for paralelizing loops with unpredictable branches on a vliw architecture
    • A. Nicolau D. Gelernter and D. Padua, editors, Pitman/The MIT Press, London
    • K. Ebcioglu and T. Nakatani. A new compilation technique for paralelizing loops with unpredictable branches on a vliw architecture. In A. Nicolau D. Gelernter and D. Padua, editors, Languages and Compilers for Parallel Computing, pages 213–229. Pitman/The MIT Press, London, 1989.
    • (1989) Languages and Compilers for Parallel Computing , pp. 213-229
    • Ebcioglu, K.1    Nakatani, T.2
  • 6
    • 0001782035 scopus 로고
    • A realistic resource-constrainted software pipelining algorithm
    • T. Gross A. Nicolau, D. Gelernter and D. Padua, editors, Pitman/The MIT Press, London
    • A. Aiken and A. Nicolau. A realistic resource-constrainted software pipelining algorithm. In T. Gross A. Nicolau, D. Gelernter and D. Padua, editors, Languages and Compilers for Parallel Computing, pages 274–290. Pitman/The MIT Press, London, 1991.
    • (1991) Languages and Compilers for Parallel Computing , pp. 274-290
    • Aiken, A.1    Nicolau, A.2
  • 7
    • 0027870809 scopus 로고
    • Lifetime-sensitive modulo scheduling
    • June
    • R. Huff. Lifetime-sensitive modulo scheduling. In proceedings of ACM SIGPLAN PLDI, pages 258–267, June 1993.
    • (1993) Proceedings of ACM SIGPLAN PLDI , pp. 258-267
    • Huff, R.1
  • 8
    • 84957684546 scopus 로고
    • A novel framework of register allocation for software pipelining
    • January
    • Q. Ning and G.R. Gao. A novel framework of register allocation for software pipelining. In proceedings of POPL, January 1993.
    • (1993) Proceedings of POPL
    • Ning, Q.1    Gao, G.R.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.