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Volumn 1417, Issue , 1998, Pages 171-184

How can we design better networks for DSM systems?

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN; MEMORY ARCHITECTURE; TOPOLOGY;

EID: 84957365714     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-69352-1_15     Document Type: Conference Paper
Times cited : (11)

References (14)
  • 2
    • 0000792985 scopus 로고    scopus 로고
    • Reducing Cache Invalidation Overheads in Wormhole DSMs Using Multidestination Message Passing
    • Chicago, IL, Aug
    • D. Dai and D. K. Panda. Reducing Cache Invalidation Overheads in Wormhole DSMs Using Multidestination Message Passing. In Proceedings of the International Conference on Parallel Processing, pages 1:138-145, Chicago, IL, Aug 1996.
    • (1996) Proceedings of the International Conference on Parallel Processing , vol.1 , pp. 138-145
    • Dai, D.1    Panda, D.K.2
  • 5
    • 0025448089 scopus 로고
    • Performance Analysis of k-ary n-cube Interconnection Network
    • June
    • W. J. Dally. Performance Analysis of k-ary n-cube Interconnection Network. IEEE Transactions on Computers, pages 775-785, June 1990.
    • (1990) IEEE Transactions on Computers , pp. 775-785
    • Dally, W.J.1
  • 8
    • 0026839484 scopus 로고
    • The Stanford DASH Multiprocessor
    • March
    • D. Lenoski et al. The Stanford DASH Multiprocessor. IEEE Computer, pages 63-79, March 1992.
    • (1992) IEEE Computer , pp. 63-79
    • Lenoski, D.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.