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Volumn , Issue , 1997, Pages 7-11

Efficient utilization of scratch-pad memory in embedded processor applications

Author keywords

[No Author keywords available]

Indexed keywords

CODE CONVERTERS; DYNAMIC RANDOM ACCESS STORAGE; STATIC RANDOM ACCESS STORAGE; CACHE MEMORY; EMBEDDED SYSTEMS; MEMORY ARCHITECTURE;

EID: 84957107095     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/edtc.1997.582323     Document Type: Conference Paper
Times cited : (32)

References (10)
  • 4
    • 62349131952 scopus 로고
    • The cache performance and optimizations of blocked algorithms
    • April
    • M. Lam, et. al., "The cache performance and optimizations of blocked algorithms, " Proceedings ASPLOS, April 1991.
    • (1991) Proceedings ASPLOS
    • Lam, M.1
  • 7
    • 0030394812 scopus 로고    scopus 로고
    • Memory organization for improved data cache performance in embedded processors
    • P. R. Panda, N. D. Dutt, and A. Nicolau, "Memory Organization for Improved Data Cache Performance in Embedded Processors, " Intl. Symp. on System Synth., 1996.
    • (1996) Intl. Symp. on System Synth
    • Panda, P.R.1    Dutt, N.D.2    Nicolau, A.3
  • 10
    • 33746800845 scopus 로고
    • New processor families join embedded fray
    • Dec
    • James L. Turley, "New Processor Families Join Embedded Fray, " Microprocessor Report, Vol. 8, No. 17, Dec. 1994.
    • (1994) Microprocessor Report , vol.8 , Issue.17
    • Turley, J.L.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.