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Volumn 1633, Issue , 1999, Pages 354-367

Mechanizing proofs of computation equivalence

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED ANALYSIS; SEMANTICS;

EID: 84957082848     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-48683-6_31     Document Type: Conference Paper
Times cited : (5)

References (18)
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  • 3
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    • Chou, C.1    Gafni, E.2
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    • Decompositions of distributed programs into communication closed layers
    • T. Elrad and N. Francez. Decompositions of distributed programs into communication closed layers. Science of Computer Programming, 2(3):155-173, 1982.
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    • Elrad, T.1    Francez, N.2
  • 7
    • 33749328617 scopus 로고    scopus 로고
    • On the costs and benefits of using partial-order methods for the verification of concurrent systems
    • D. Peled, V. Pratt, and G. Holzmann, editors, American Mathematical Society, DIMACS Series in Discrete Mathematics and Theoretical Computer Science, vol. 29
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    • Godefroid, P.1
  • 8
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    • Refinement with global equivalence proofs in temporal logic
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    • S. Katz. Refinement with global equivalence proofs in temporal logic. In D. Peled, V. Pratt, and G. Holzmann, editors, Partial Order Methods in Verification, pages 59-78. American Mathematical Society, 1997. DIMACS Series in Discrete Mathematics and Theoretical Computer Science, vol. 29.
    • (1997) Partial Order Methods in Verification , pp. 59-78
    • Katz, S.1
  • 9
    • 0025506042 scopus 로고
    • Interleaving set temporal logic
    • Preliminary version was in the 6th ACM-PODC, 1987
    • S. Katz and D. Peled. Interleaving set temporal logic. Theoretical Computer Science, 75:263-287, 1990. Preliminary version was in the 6th ACM-PODC, 1987.
    • (1990) Theoretical Computer Science , vol.75 , pp. 263-287
    • Katz, S.1    Peled, D.2
  • 10
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    • Katz, S.1    Peled, D.2
  • 13
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    • Formal verification for fault-tolerant architectures: Prolegomena to the design of PVS
    • February
    • Sam Owre, John Rushby, Natarajan Shankar, and Friedrich von Henke. Formal verification for fault-tolerant architectures: Prolegomena to the design of PVS. IEEE Transactions on Software Engineering, 21(2):107-125, February 1995.
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    • (eds). American Mathematical Society, DIMACS Series in Discrete Mathematics and Theoretical Computer Science, vol. 29
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  • 17
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    • September
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.