An applications approach to evolvable hardware

Proceedings of the 1st NASA/DoD Workshop on Evolvable Hardware

Volumn , Issue , 1999, Pages 170-174

  Porter, R ^a   McCabe, K ^a   Bergmann, N ^b  

^a LOS ALAMOS NATIONAL LABORATORY   (United States)

^b QUEENSLAND UNIVERSITY OF TECHNOLOGY   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); GENETIC ALGORITHMS; IMAGE PROCESSING; INTEGRATED CIRCUIT DESIGN; NASA; OPTIMIZATION;

DESIGN ENVIRONMENT; DESIGN PRINCIPLES; EVOLVABLE HARDWARE; FITNESS EVALUATIONS; HARDWARE ACCELERATORS; HARDWARE ARCHITECTURE; PROBLEM DOMAIN; SPEED UP;

HARDWARE;

EID: 84957016202     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EH.1999.785449     Document Type: Conference Paper

References (10)

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