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Volumn 697 LNCS, Issue , 1993, Pages 154-165

Combining model checking and theorem proving to verify parallel processes

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED ANALYSIS; SPECIFICATIONS; THEOREM PROVING;

EID: 84956986947     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-56922-7_13     Document Type: Conference Paper
Times cited : (16)

References (9)
  • 3
    • 85029452321 scopus 로고    scopus 로고
    • Functional extension of symbolic model checking
    • Filkorn, T. Functional extension of symbolic model checking, in: Proc. CAV’91.
    • Proc. CAV’91
    • Filkorn, T.1
  • 5
    • 0007694967 scopus 로고
    • HOL: A proof generating system for higher-order logic
    • Birtwistle, Subrahmanyam
    • Gordon, M.J.C. HOL: A proof generating system for higher-order logic, in: Birtwistle, Subrahmanyam (eds) VLSI specification, verification and synthesis, Kluwer (1988), 73-128.
    • (1988) VLSI Specification, Verification and Synthesis, Kluwer , pp. 73-128
    • Gordon, M.J.C.1
  • 9
    • 85051051500 scopus 로고    scopus 로고
    • Expressing interesting properties of programs in propositional temporal logic
    • Wolper, P. Expressing interesting properties of programs in propositional temporal logic, POPL ’86, 184-193.
    • POPL ’86 , pp. 184-193
    • Wolper, P.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.