Use of particle swarm optimization to design combinational logic circuits

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2606, Issue , 2003, Pages 398-409

  Coello, Carlos A Coello ^a   Luna, Erika Hernández ^a   Aguirre, Arturo Hernández ^b  

^a DEPARTAMENTO DE FÍSICA   (Mexico)

^b CENTRO DE INVESTIGACIÓN EN MATEMÁTICAS   (Mexico)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER CIRCUITS; DESIGN; GENETIC ALGORITHMS; HARDWARE; INTEGRATED CIRCUIT MANUFACTURE; LOGIC DESIGN; OPTIMIZATION; PARTICLE SWARM OPTIMIZATION (PSO); RECONFIGURABLE HARDWARE;

BINARY PARTICLE SWARM OPTIMIZATION; CIRCUIT DESIGNS; DESIGN COMBINATIONAL LOGIC CIRCUITS; GATE LEVELS; INTEGER REPRESENTATION; KARNAUGH MAPS;

LOGIC CIRCUITS;

EID: 84956979307     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: None     Document Type: Conference Paper

References (13)

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